MSC8144E Reference Manual, Rev. 3
14-46
Freescale
Semiconductor
Direct Memory Access (DMA) Controller
Table 14-30 shows the DMA channel parameters for a multi-dimensional buffer.
MR
5
Mask Requests Until Data Reached Destination
Indicates the behavior of the logic when BD_SIZE reaches
zero. Typically, in continuous buffers, the channel should not
be masked. However, there is an automatic mask when
continuous buffers switch between ports. The DMA controller
unmasks the requests when the last data reaches the
destination.
0 Normal
operation.
1 Mask requests until data reached
destination.
—
4–3
Reserved. Write to zero for future compatibility.
BTSZ
2–0
Basic Transfer Size
The basic transfer size issued for the request. If BTSZ is
greater than TSZ, the DMA controller uses TSZ for the
transfer size.
000
64 bytes
001
1 byte
010
2 bytes
011
4 bytes
100
8 bytes
101
16 bytes
110
32 bytes
111
64 bytes
Table 14-30. Multi-Dimensional BD Field Descriptions
Bits
Description
BD_MD_ADDR
255–224
Current Buffer Address
Holds the buffer address pointer. This value increments on every transaction the DMA controller issues
for this buffer. When BD_MD_SIZE reached zero and the next dimension is active, the next dimension
offset is added to the BD_MD_ADDR. For details, see Section 14.2, Buffer Types, on page 14-2.
BD_MD_BSIZE
223–208
First Dimension Buffer Base Size
Contains the base size for the buffer first dimension.
BD_MD_SIZE
207–192
First Dimension Buffer Size
Holds the remaining size for the buffer first dimension. This value is incremented by the transfer size
each time the DMA controller issues a transaction, until it reaches zero. When BD_MD_SIZE reaches
zero, its value is restored to the value of BD_MD_BSIZE.
Note:
BD_MD_SIZE must not be programmed to zero. Programming the value to zero sets
DMAERR[BDSZ] and freezes the channel. To reactivate the channel, you must disable the
channel, wait for the active status bit to go to clear, reprogram the BDs, and reactivate the
channel.
BD_MD_ATTR
191–144
Multi-Dimensional Buffer Attributes
This 48-bit parameter describes the multi-dimensional attributes of the channel handling this buffer. The
BD_MD_ATTR parameters are described in Table 14-31.
BD_MD_2D
143–92
Two-Dimensional Buffer Offset, Bcount, and Count
This 52-bit parameter holds the two-dimensional parameters of the channel handling this buffer. It holds
the base count value, current count, and address offset. The Multi Dimension fields are described in
Table 14-32, BD_MD_2D Field Descriptions, on page 14-50.
BD_MD_3D
91–40
Three-Dimensional Buffer Offset, Bcount, and Count
This 52-bit parameter holds the three-dimension parameters of the channel handling this buffer. It holds
the base count value, current count, and address offset. The Multi Dimension fields are described in
Table 14-33, BD_MD_3D Field Descriptions, on page 14-50.
Table 14-29. BD_ATTR Field Descriptions (Continued)
Bits
Description
Settings
Summary of Contents for MSC8144E
Page 1: ...MSC8144E Reference Manual Quad Core Media Signal Processor MSC8144ERM Rev 3 July 2009 ...
Page 48: ...MSC8144E Reference Manual Rev 3 xlviii Freescale Semiconductor ...
Page 86: ...MSC8144E Reference Manual Rev 3 1 38 Freescale Semiconductor Overview ...
Page 168: ...MSC8144E Reference Manual Rev 3 3 60 Freescale Semiconductor External Signals ...
Page 242: ...MSC8144E Reference Manual Rev 3 5 26 Freescale Semiconductor Reset ...
Page 314: ...MSC8144E Reference Manual Rev 3 8 24 Freescale Semiconductor General Configuration Registers ...
Page 414: ...MSC8144E Reference Manual Rev 3 10 14 Freescale Semiconductor MSC8144E SC3400 DSP Subsystem ...
Page 452: ...MSC8144E Reference Manual Rev 3 11 38 Freescale Semiconductor Internal Memory Subsystem ...
Page 520: ...MSC8144E Reference Manual Rev 3 12 68 Freescale Semiconductor DDR SDRAM Memory Controller ...
Page 1070: ...MSC8144E Reference Manual Rev 3 21 28 Freescale Semiconductor Timers ...