1-6
MPC566EVB User’s Manual
System Memory
Following is the default memory map for this board as configured by the Debug Monitor located
in the external flash bank. The internal memory space of the MPC566 is detailed further in the
MPC565-6 Users Manual. Chip Selects 0-3 can be changed by user software to map the external
memory in different locations but the chip select configuration such as wait states and transfer
acknowledge for each memory type should be maintained.
Possible Chip Select usage:
Synchronous SRAM Memory Bank
CS0 or CS1
default CS1, MAP SW. 1,2
Synchronous FLASH Memory Bank
CS0 or CS2
default CS0, MAP SW. 3,4
10/100T / LCD Port
CS3
default CS3, MAP SW. 6,7
MPC566 Internal Flash
N/A
MAP_SW. 8, may effect mem-
ory map of chip selects
The MPC566EVB Default Memory Map shows the MPC566EVB memory map.
1.2.5.1
Memory Device / Bank Selection and Configuration.
The MPC566EVB board has one internal memory bank, two external memory banks and a
Peripheral memory bank that provide:
•
36KByte Internal SRAM
•
MPC566
512K byte Internal FLASH Memory (U1)
•
256K x 32bit (1MByte) Synchronous Static RAM (U2/3).
Table 1-1. The MPC566EVB Default Memory Map
Address Range
Signal and Device
0x0000_0000 - 0x0007_FFFF
1MB UC3F Flash
0x0010_0000 - 0x002F_7FFF
Reserved for Flash
0x002F_8000 - 0x002F_8FFF
BBC DECRAM 4 KBytes
0x002F_9000 - 0x002F_9FFF
Reserved for BBC
0x002F_A000 - 0x002F_BFFF
BBC Control
0x002F_C000 - 0x002F_FFFF
USIU & Flash Control
0x0030_0000 - 0x0030_7FFF
UIMB I/F & IMB Modules 32KBytes
0x0030_8000 - 0x0037_FFFF
Reserved for IMB
0x0038_0000 - 0x0038_007F
CALRAM/READI Control
0x0038_0080 - 0x0038_3FFF
Reserved (L-bus Control)
0x0038_4000 - 0x003F_6FFF
Reserved (L-bus Memory)
0x003F_7000 - 0x003F_FFFF
CALRAM (internal SRAM)
0x0080_0000 - 0x00A0_0000
External Flash 2MByte (0x0090_0000 -
0x00A0_0000 reserved for dBUG)
0x0100_0000 - 0x0108_0000
Ethernet
0xFFF0_0000 - 0xFFFF_FFFF
External SRAM 1MB
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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