S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor
799
Appendix E
LCD Electrical Specifications
E.1
LCD Driver
Table E-1. LCD40F4B Driver Electrical Characteristics
1) Outputs measured one at a time, low impedance voltage source connected to the VLCD pin.
The 1/3, 1/2 and 2/3 VLCD voltage levels are buffered internally with an asymmetric output stage, as
shown in
Figure E-1. Buffer configuration (left) and buffer output stage (right)
The switching matrix applies a capacitive load (LCD elements) to the buffer output. The charge excites
the buffer output voltage V
Buf
from the target output voltage which can be 1/3, 1/2 or 2/3 VLCD. After a
positive spike on V
Buf
a frontplane or backplane is discharged by an active load with a constant current.
After a negative spike on V
Buf
the output is charged through a transistor which is switched on and which
behaves like a resistor. Simplified output voltage transients are shown in
transients emphasize the spikes and the voltage recovery. They are not to scale. The buffer output
Characteristic
C
Symbol
Min.
Typ.
Max.
Unit
LCD Output Impedance(BP[3:0],FP[39:0])
for outputs to charge to higher voltage level or to
GND
1)
D
Z
BP/FP
-
-
5.0
k
LCD Output Current (BP[3:0],FP[39:0])
for outputs to discharge to lower voltage level ex-
cept GND
1)
D
I
BP/FP
50
-
-
A
switch
matrix
to LCD
V
Buf
V
Buf
VLCD
VDDX
output MOSFET
active load
I
out
