Chapter 1 Device Overview MC9S12ZVHY/MC9S12ZVHL Families
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
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Freescale Semiconductor
1.5.16
Inter-IC Bus Module (IIC)
•
Compatible with I
2
C bus standard
•
Multi-master operation
•
Software programmable for one of 256 different serial clock frequencies
•
Software selectable acknowledge bit
•
Interrupt driven byte-by-byte data transfer
•
Arbitration lost interrupt with automatic mode switching from master to slave
•
Calling address identification interrupt
•
Start and stop signal generation/detection
•
Repeated start signal generation
•
Acknowledge bit generation/detection
•
Bus busy detection
•
General Call Address detection
•
Compliant to ten-bit address
1.5.17
Serial Communication Interface Module (SCI)
•
Full-duplex or single-wire operation
•
Standard mark/space non-return-to-zero (NRZ) format
•
16-bit baud rate selection
•
Programmable character length
•
Programmable polarity for transmitter and receiver
•
Active edge receive wakeup
•
Break detection/generation supporting LIN communications
1.5.18
Serial Peripheral Interface Module (SPI)
•
Configurable 8- or 16-bit data size
•
Full-duplex or single-wire bidirectional
•
Double-buffered transmit and receive
•
Master or slave mode
•
MSB-first or LSB-first shifting
•
Serial clock phase and polarity options
1.5.19
Analog-to-Digital Converter Module (ADC)
•
One ADC
— 10-bit resolution
— Up to 8 external channels & 8 internal channels
