Chapter 8 Timer Module (TIM16B8CV3) Block Description
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
316
Freescale Semiconductor
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The Prescaler can be calculated as follows depending on logical value of the PTPS[7:0] and PRNT bit:
PRNT = 1 : Prescaler = PTPS[7:0] + 1
Table 8-24. Precision Timer Prescaler Selection Examples when PRNT = 1
8.4
Functional Description
This section provides a complete functional description of the timer TIM16B8CV3 block. Please refer to
the detailed timer block diagram in
as necessary.
Table 8-23. PTPSR Field Descriptions
Field
Description
7:0
PTPS[7:0]
Precision Timer Prescaler Select Bits
— These eight bits specify the division rate of the main Timer prescaler.
These are effective only when the PRNT bit of TSCR1 is set to 1.
shows some selection examples in
this case.
The newly selected prescale factor will not take effect until the next synchronized edge where all prescale counter
stages equal zero.
PTPS7
PTPS6
PTPS5
PTPS4
PTPS3
PTPS2
PTPS1
PTPS0
Prescale
Factor
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
2
0
0
0
0
0
0
1
0
3
0
0
0
0
0
0
1
1
4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
0
0
1
0
0
1
1
20
0
0
0
1
0
1
0
0
21
0
0
0
1
0
1
0
1
22
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
1
1
1
1
1
0
0
253
1
1
1
1
1
1
0
1
254
1
1
1
1
1
1
1
0
255
1
1
1
1
1
1
1
1
256