Freescale Semiconductor KIT33912EVME, Setup Instructions

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Interconnect Board Description
KIT33912EVME System Basis Chip with LIN Tranceiver Setup Instructions, Rev. 2.0
Freescale Semiconductor 27
Chapter 9 Interconnect Board Description
9.1 Overview
This chapter gives a basic description of the Interconnect Board. The following sections provide the basic information:
• 9.2, J1 RS232
• 9.3, J201 Background Debug Mode (BDM)
• 9.4, J3 External Control
• 9.5, CON1 LIN Bus Connector
• 9.6, CON2 HSx LSx Outputs
• 9.7, CON3 Lx Inputs
• 9.8, CON4 The MCU Input Output Pins
• 9.9, CON5 ISENSE Inputs
9.2 J1 RS232
The RS232 connector J1 allows connection to a PC. Table 9-1 shows the terminal definitions for the J1 connector.
Table 9-1. J1 Serial Peripheral Interface Terminal Definitions
Terminal Terminal Name Definition
1 Not used Carrier detect.
2 TXD Transmit data from MCU to PC.
3 RXD Received data from PC to MCU.
4 Not used Data terminal ready.
5 GND Ground.
6 Not used Data set ready, Carrier detect.
7 NC No connect.
8 NC No connect.
9 NC No connect.
9.3 J201 Background Debug Mode (BDM)
The MCU contains a single wire background debug interface that supports in-circuit programming of on-chip nonvolatile memory
and sophisticated non-intrusive debug capabilities.
Table 9-2 shows the standard definition for a 6 pin connector.
Table 9-2. J201 Program Debug Terminal Definition
Terminal Terminal Name Definition
1 BKGD Background debug.
2 GND Ground.
3 NC No connect.
4 RESET Reset.
5 NC No connect.
6 VDD +5V voltage supply.