Fluke PM3082, Service Manual

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UNIT DESCRIPTIONS
5
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1 - 1 1
D8004 has inputs and outputs with the following functions:
- TBEOHO-LX goes low at the end of the hold-off period.
- TBAUTO-LD is low if auto free run mode is active.
- TBEOM-HX goes high at the end of the MTB sweep.
- TBSTD-LX goes low to start the DTB sweep.
- TBEOD-HX goes high at the end of the delayed sweep.
- TBNOTTR-HT goes high if the MTB is not triggered.
- TBSEL selects MTB if high and DTB if low.
- TBSSG-HT goes high at the end of a single sweep.
- DSOM (pin 2) goes high if a MTB trigger occurs. The connected circuit with V8023/V8024 is used
for extensions such as digital signal storage.
- DSOD goes high if a DTB trigger occurs. The connected circuit with V8029/V8031 is used for
extensions such as digital signal storage. DSOD is also input signal for the "V peak-peak circuit".
- TBCAUT is connected with timing network R8052/R8066/R8133/C8011 /V8067/V8068. This
network determines in auto free run mode the 100ms waiting time after which the MTB becomes
free running.
V8061A/8062/V8063/V8066 form the "V peak-peak circuit". It plays a role as the automatic
positioning of the cursors on the top and bottom of the signal (Vpp mode). This function works via the
DTB trigger circuit and is mainly software based. V8062/V8063 form a set-reset flipflop with inputs
with hysteresis. The flipflop is set with the DSOD pulse that goes high at the moment that a DTB
trigger pulse is detected. This is signalled to the microprocessor via V8066 which makes the TTL
signal VPPTEST-LD. The shape of the waveform is scanned by the microprocessor by monitoring
the signal VPPTEST-LD at different DTB trigger LEVEL positions. The flipflop is reset by the
microprocessor via signal STRCALD-HT.
The balanced output signals ZTRAO and ZTRA1 from pin 10 and 11 of D8003 are applied to the final
Z-amplifier in order to control the intensity on the CRT screen. An important input signal is TBZB from
D8004/19. This signal is high if the MTB sweep is on and during this time the light on the CRT is on.
The intensified part during the time that the DTB sweep is on is switched on if signal TBZA is high.
TBZA originates from D8004/20.
The signal CHBL that is applied to D8003/15 is influenced from the chopper blanking signal
CHBLANK-HX and from the external Z-MODulation signal. The DAC output signals TBINTRAT-XA
(pin 3) and INTTRA respectively influence the intensity ratio between MTB and DTB display and the
total intensity on the CRT.
The signal TBXDEFL-LD (pin 6) switches the light continuously on if it is low. This happens in the X-
DEFLection mode.
The circuit with V8002/V8006 is used for Z-MODulation via the BNC socket at the rear of the
oscilloscope. The output signal of the circuit is TBZEXT and it is applied to D8003/16.
D9008 has outputs that control a number of on/off functions. The IC’s of this type are connected in
cascade as a shift register. The IC’s are controlled by the microprocessor on unit A3. This happens
via the data signal TBD01 (from the preceding D9011); the synchronization signal TBSCL (Time Base
Serial CLock). The enable signal is STROBE1-HT. New data can be clocked into the shift register if
STROBE1-HT is low. The new data becomes available at the outputs at the low-to-high transition of
STROBE1-HT.
N8005 is an octal digital-to-analog converter. The IC has 8 outputs that can deliver a DC voltage that
is adjustable between 0.5 and 9.5 V. This is controlled by the microprocessor on unit A3 via 6 bits of
information that allow 64 adjustment steps. This happens via the data signal SDA (Serial DAta) and
the synchronization signal SCL (Serial CLock). The data bits are preceeded by address bits that are
compared with the fixed address A0/A1/A2 applied to pin 7, 8 and 9. This determines if N8005 or
similar IC’s in the instrument will react on the bitstream.
Note: a solder pad is present in the SDA and SCL input lines of each IC. This gives the possibility
to isolate one IC from the others in case a fault is suspected.