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UNIT DESCRIPTIONS
5.1 -9
5.1.1.5 Main and delayed time base triggering
Diagram 12
The main time base triggering (MTR) is mainly formed by IC D6541. The other IC D6621 is the peak-
peak detector for the trigger level. The balanced input signal for triggering on vertical channels 1,2,
3 or 4 is applied to pin 7 and 8. This signal can originate from one of the 4 vertical preamplifier
sections where the source selection is also done. The dc biasing currents come from the circuit with
V6506, V6507 and V6532. This circuit is also supplied with the line trigger sinewave signal MTRLINE
that comes from the power supply. This signal can be used for mains/line triggering and is selected
on the next diagram.
The output signal of D6541 is available at pin 19 and 20. This signal is routed to the main time base
(MTB) via the level shifters V6573 and V6574. The signal MTRVIDEO from output pin 2 of D6541 is
routed to the TV trigger circuit.
The IC D6541 incorporates the filters for HF reject (external capacitor C6549), LF reject (external
capacitor C6551) and AC (external capacitors C6559, C6561, C6562). These filter modes are
switched with the control signals MTRLF-HD (pin 3) and MTRHF-HD (pin 14). Positive/negative slope
and video are switched with the control signals MTRSLOPE (pin 21) and MTRTVSEL-HD (pin 4). The
logic levels of these control signals are indicated in two tables on the diagram. The signal MTRSEN
is a DAC output voltage that determines the gain of the trigger amplifier.
A balanced current signal leaves D6541 at pins 26 and 27. This signal is converted into a voltage
signal via V6604 and V6606. The voltage signal is applied to pins 3 and 7 of the peak-peak detector
D6621. This IC detects the positive and negative peak values of the trigger signal. It reduces in the
peak-peak trigger mode (switched with MTRPPLEV-HD) the range of the level (LEVMTB) to just
within the peak-peak signal value.
The output of the peak-peak detector is present at pin 14 and 15 and routed to level input pin 22 and
23 of D6541, via the level shifter with V6667, V6668, V6686 and V6687. At this point a level offset
correction is also introduced via DAC signal MTRBAL. The level is fixed in TV trigger mode by giving
signal LEVMTB a predefined fixed level. The output pulse MTRTVSYNC from the TV synchronization
separator circuit (see next diagram) is applied to the base of V6687. This signal is interrupted if the
TV trigger mode is off.
The series parallel converter D9011 has outputs that control a number of on/off functions in the MTB
triggering. D9011 is controlled by the microprocessor on unit A3. This happens via the data signal
SDA (Serial DAta) and the synchronization signal SCL (Serial CLock). The enable signal is
STROBE1-HT.
Diagram 13
This diagram shows the TV trigger circuit. The signal MTRVIDEO from pin 2 of MTR circuit D6541 is
applied to the input of the TV CLAMP circuit V6754/V6757/V6759/V6763A/6768. The peak level of
the synchronization pulses is detected via V6757 and C6758. The TV signal at the base of V6768 is
kept at a constant level via V6759 and V6754. Diode V6761 cuts off the video information so that only
synchronization pulses are applied to input pin 2 of N6771.
The TV synchronization separator N6771 is able to decode three different types of sync pulses. The
analog control signal MTRTVMODE at pin 6 can have 3 different values that determine the TV
standard in which the circuit will work. The standards and respective control voltages are indicated in
a table.
N6771 separates the TV synchronization pulses. The following signals are available at its outputs:
- Pin 1 carries negative going line (MTRTVL) pulses. These pulses can be applied to the MTB
trigger (MTR) section via multiplexer D6781. Via multiplexer D7711/3,4,5,9 they are applied to the
delayed trigger (DTR) section.
- Pin 3 carries the negative going field pulses (MTRTVFR) that appear at the beginning of field 1
and field 2.
Summary of Contents for PM3082
Page 34: ...DESCRIPTIONS 3 1 ST8235A 970415 ...
Page 35: ...DESCRIPTIONS r _A1 SIGNAL UNIT TRIGGERING ...
Page 36: ...3 1 TIME BASES ST8235A 970415 ...
Page 37: ...3 2 DESCRIPTIONS ST82358 97041S ...
Page 38: ...XYSW ...
Page 79: ...5 1 22 UNIT DESCRIPTIONS Lay out 2 Small component side of signal unit A1 ...
Page 93: ...5 1 33 09001 2 01201 3 01201 5 C 1 O 6 0 T 10n A1 Diagram 1 Attenuator CH 1 PM3094 PM3092 ...
Page 96: ...5 1 34 UNIT DESCRIPTIONS 09001 17 A1 Diagram 2 Attenuator CH 2 PM3094 PM3092 ...
Page 99: ...5 1 35 X I STB241 970420 A1 Diagram 2a Attenuator CH 1 PM3094 PM3092 ...
Page 100: ...5 1 36 UNIT DESCRIPTIONS 12AT3 12AT3 STQ24S 970420 Diagram 3 Attenuator CH 3 PM3094 ...
Page 101: ...J a C3077 I I T b M A AT350C N1101 2AT3 12AT3 ...
Page 102: ...5 1 36 UNIT DESCRIPTIONS 12AT3 STB242 970420 Diagram 3 Attenuator CH 3 PM3094 ...
Page 104: ...5 1 37 12AT4 D4201 3 D4201 5 ST8243 97D420 Diagram 4 Attenuator CH 4 PM3094 ...
Page 105: ...UNIT DESCRIPTIONS C4071 lOn C4072 lOn AC DC f HIGH IMPEDANCE ATTENUATOR LF IMPE CONVE R40Q2 ...
Page 107: ... 12AT 12AT4 l i C4067 160u 25V C4068 10n K4002 ...
Page 109: ...I i 04097 1 0 O u 25V J 25V 10n 25V ...
Page 113: ...UNIT DESCRIPTIONS PROBE CALIBRATOR GNOR6F f 1CVREF f C11S0 180u 25V C1157 10 0n GNDREF GNDREF ...
Page 115: ...5 1 40 UNIT DESCRIPTIONS Diagram 6 Preamplifier CH 1 and CH 2 ...
Page 116: ...PAOREF N32Q2 12 ...
Page 117: ...5 1 40 UNIT DESCRIPTIONS Diagram 6 Preamplifier CH 1 and CH 2 ...
Page 118: ...UNIT DESCRIPTIONS 5 1 41 l GAIN CONTROLVAR X1 2 X5 Diagram 7 Preamplifier CH 3 and CH 4 ...
Page 119: ...UNIT DESCRIPTIONS ...
Page 120: ...5 1 41 PMVAR ft4220 Diagram 7 Preamplifier CH 3 and CH 4 ...
Page 121: ...5 1 42 UNIT DESCRIPTIONS Diagram 8 Y functions ...
Page 122: ... 12FNC12 I2R4C12 12FNC34 12FNC34 R1S13 1K47 FNC FI ...
Page 123: ...5 1 42 UNIT DESCRIPTIONS 12FNC12 FM2MV 00003 7 12FNC12 H2FNC12 Diagram 8 Y functions ...
Page 124: ...UNIT DESCRIPTIONS 10P 120LD REF VOLTAGE DG001 HEF40M I f 1 ...
Page 129: ... REF VOLTAGE j D5001 HEF4009 DS001 HEF40M If C0RHECT10N VOLT N5001 366 f ...
Page 133: ...5 1 45 D5501 HEF4053 CNT STB251 970428 Diagram 10 Display and trigger control ...
Page 138: ...5 1 47 Diagram 12 MTB trigger ...
Page 142: ...5 1 48 UNIT DESCRIPTIONS TV SYNC SEPABATOtT TV UNE FRAME SEUECTKDN Diagram 13 TV line trigger ...
Page 143: ...UNIT DESCRIPTIONS 5 1 49 160TR Diagram 14 DTB trigger ...
Page 146: ...5 1 50 UNIT DESCRIPTIONS Diagram 15 Time base logic ...
Page 148: ...5 1 50 UNIT DESCRIPTIONS V 6 0 0 4 Diagram 15 Time base logic ...
Page 149: ...UNIT DESCRIPTIONS 5 1 51 Diagram 16 Main time base ...
Page 150: ...UNIT DESCRIPTIONS R6001 ...
Page 151: ...5 1 51 ...
Page 153: ......
Page 154: ...5 1 52 UNIT DESCRIPTIONS R716Y C7181 ONLY IN PM30Q2 PM3004 Diagram 17 Delayed time base ...
Page 155: ...UNIT DESCRIPTIONS 5 1 53 X9001 I 1 D 0 O O 8 1 Diagram 18 Connectors ...
Page 214: ...UNIT DESCRIPTIONS 5 2 13 5 2 5 Circuit diagrams A2 200 MHz version ...
Page 215: ...UNIT DESCRIPTIONS 5 2 5 Circuit diagrams A2 200 MHz version 0501 22 ...
Page 216: ...5 2 13 ...
Page 217: ...5 2 14 UNIT DESCRIPTIONS A2 200 MHz Diagram 2 Final Y output stage ...
Page 218: ......
Page 219: ...5 2 14 UNIT DESCRIPTIONS STB263 970428 A2 200 MHz Diagram 2 Final Y output stage ...
Page 223: ...5 2 16 UNIT DESCRIPTIONS AC20mV DC 10V AC 80mV OCMOV A2 200 MHz Diagram 4 Final Z amplifier ...
Page 224: ...AC 60mV DC 1CV R3311 511E M20Q2 11 AST03 R3313 1 2KB7 V3311 ...
Page 226: ...UNIT DESCRIPTIONS 5 2 17 A2 200 MHz Diagram 5 Modulator demodulator and focus control ...
Page 227: ...UNIT DESCRIPTIONS FOCUS L i X2401 ...
Page 228: ...5 2 17 A2 200 MHz Diagram 5 Modulator demodulator and focus control ...
Page 231: ...8 5 ii 8 HI I Hl H s HI I i HI I ...
Page 232: ...g I S 5 S I 1 H H r lr H J g if j r r 8 3 8 8 S 3 5 5 H H 5 3 r l r l H H n ft 3 S 5 8 a s 5 ...
Page 268: ...UNIT DESCRIPTIONS 5 2 11 Circuit diagrams A2 100 MHz version ...
Page 269: ...5 2 47 ...
Page 270: ...5 2 48 UNIT DESCRIPTIONS TO CflT ...
Page 271: ......
Page 280: ...UNIT DESCRIPTIONS X2411 ...
Page 281: ...5 2 51 FOCUS LEVELSHIFTER A2 100 MHz Diagram 5a Modulator demodulator and focus control ...
Page 284: ... ...
Page 285: ...a 5 a I H rI 3 H H H 8 K fc 5 3 3 I I ...
Page 308: ...t 0 0 0 0 0 0 0 0 0 3 sS cn 03 03 UNIT DESCRIPTIONS ...
Page 310: ...R1102 R1101 R1679 R1672 R1071 R1104 B1674 u HI 406 H i402 D1402 O N j oo O O ai 5 3 ...
Page 311: ...bc646c Up BC866C 3Lp ...
Page 313: ......
Page 317: ...UNIT DESCRIPTIONS 5 3 9 5 3 5 Circuit diagrams Diagram 1 Central processor unit ...
Page 318: ...UNIT DESCRIPTIONS 5 3 5 Circuit diagrams ...
Page 319: ...5 3 9 r i Diagram 1 Central processor unit ...
Page 324: ...UNIT DESCRIPTIONS ...
Page 325: ...5 3 11 Cl 968 T 1 0 0 n C1963 I80u Diagram 3 Potentiometer DAC and lEEE option h i m ...
Page 326: ...5 3 12 UNIT DESCRIPTIONS G4 oi TEXT CURSOR CONTBOL 12MG Diagram 4 Text and cursor circuit i ...
Page 328: ...5 3 12 UNIT DESCRIPTIONS G4401 12MG TEXT CURSOR CONTROL Diagram 4 Text and cursor circuit ...
Page 342: ...UNIT DESCRIPTIONS 5 4 4 Unit lay outs TO X5201 ON CRT CONTROL A5 I O C O I D C G C I ...
Page 344: ...UNIT DESCRIPTIONS 5 4 4 Unit lay outs TO X5201 ON CRT CONTROL A5 H cc c c IH ...
Page 360: ...sna iu o UNIT DESCRIPTIONS 5 5 3 5 5 3 Circiuit diagram X5201 A5 Diagraml CRT controls unit ...
Page 367: ...UNIT DESCRIPTIONS 5 6 3 Unit lay outs TO X2401 ON ...
Page 369: ......
Page 371: ......
Page 372: ... 00 o o O o ...
Page 377: ...UNIT DESCRIPTIONS 5 6 5 Circuit diagrams G LI 001 fKfcjH ...
Page 379: ...5 6 10 t ...
Page 381: ... EHT CONVERT ...
Page 383: ...UNIT DESCRIPTIONS OUTPUTCIRCUIT V1271 BYV29 T1001 T1001 T1001 now T1001 T1001 now now ...
Page 394: ...UNIT DESCRIPTIONS 5 7 1 5 7 RESERVED FOR FUTURE EXTENSIONS ...
Page 395: ...UNIT DESCRIPTIONS 5 8 1 5 8 RESERVED FOR FUTURE EXTENSIONS ...
Page 396: ...UNIT DESCRIPTIONS 5 9 1 5 9 RESERVED FOR FUTURE EXTENSIONS ...
Page 397: ...UNIT DESCRIPTIONS 5 10 CONNECTOR BOARD A10 5 10 1 Unit lay out ...
Page 399: ...UNIT DESCRIPTIONS 5 10 CONNECTOR BOARD A10 5 10 1 Unit lay out 28 27 O O X IAJ 2 1 ...
Page 412: ...UNIT DESCRIPTIONS 5 11 3 Fig 1 Location of options Y out and external trigger ...
Page 413: ...UNIT DESCRIPTIONS ...
Page 414: ...5 11 3 Fig 1 Location of options Y out and external trigger ...
Page 415: ...5 11 4 UNIT DESCRIPTIONS Fig 2 Printed circuit board lay out of Y out unit ...
Page 417: ...UNIT DESCRIPTIONS 12V 12V 12V 12V X1003 YOP HX R1001 I 1 2 K 1 X1009 X1010 SCL ...