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FIBOCOM SQ806-W Series Hardware Guide
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Table 3-16 LCM pin definition
Pin Name
Pin #
I/O
Description
Note
LDO6_1V8
125
PO
LCD IO voltage
-
LDO17_2V85
129
PO
LCD analog power VDD
-
MIPI_DSI0_CLK_P
53
AO
Main-LCD MIPI clock+
-
MIPI_DSI0_CLK_N
52
AO
Main-LCD MIPI clock-
-
MIPI_DSI0_LN0_P
55
AI/AO
Main LCD MIPI Lane 0+
-
MIPI_DSI0_LN0_N
54
AI/AO
Main LCD MIPI Lane 0-
-
MIPI_DSI0_LN1_P
57
AI/AO
Main LCD MIPI Lane 1+
-
MIPI_DSI0_LN1_N
56
AI/AO
Main LCD MIPI Lane 1-
-
MIPI_DSI0_LN2_P
59
AI/AO
Main LCD MIPI Lane 2+
-
MIPI_DSI0_LN2_N
58
AI/AO
Main LCD MIPI Lane 2-
-
MIPI_DSI0_LN3_P
61
AI/AO
Main LCD MIPI Lane 3+
-
MIPI_DSI0_LN3_N
60
AI/AO
Main LCD MIPI Lane 3-
-
LCD_RST_N
49
DO
Main
LCD reset
-
PWM
29
DO
LCD backlight PWM control
-
LCD_TE
50
DI
Swipe Sync
-
The reference design of LCD interface circuit is as follows:
