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FIBOCOM MC610 Series Hardware Guide
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Figure 3-9 EXTRST reset button reference circuit
3.3.3.2 EXTRST Control Timing Sequence
Figure 3-10 EXTRST control timing sequence
EXTRST is a sensitive signal. It is suggested to add a debounce capacitor near the module end. PCB
layout should be away from RF interference and proper surrounding with grounding lines should be made,
and routes on PCB edge and surface layer should be avoided (avoid module reset caused by ESD).
Note: