Festo EMCA-EC-67 CO Series, Description

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3 EtherCAT with FHPP
52 Festo – EMCA-EC-C-HP-EN – 2017-11e – English
3.6 Distributed Clocks DC
With Distributed Clocks DC the clocks in the EtherCAT Slave Controller ESC of all DC-capable network
participants on an EtherCAT network array can be synchronized. The first DC-capable slave in the
EtherCAT network usually takes charge of the task of Clock Masters with a reference clock (Ref Clock).
At cyclical intervals, Master transmits a synchronization datagram in which Clock Master writes the
current reference time (Ref Time) to the reference clock. All subsequent slaves read out this value.
EtherCAT Slave Controller ESC calculates the time from the reference time (Ref Time) and the run-time
established by the controller (Offset) DC(DC Time).
With every subsequent synchronization datagram, Distributed Clocks DC are synchronized continu­
ously. With Distributed Clocks DC, cyclic synchronous processes can be executed (e.g. chronologically
synchronous adoption of setpoint value from process data or cyclic synchronous operation of several
axes). Transmission and processing of cyclic process data is controlled by the Sync Manager synchron­
ization
è
Page 50.
In status transition IP (Init
è
PreOp), all Distributed Clocks DC in an EtherCAT network are configured
by the controller. In the status transitions (PreOp
è
SafeOp), DC-synchronization is established in the
EtherCAT network. Then the Clock Slaves are restored to status Operational (Op).
The diagram shows the DC-topology and synchronization of the EtherCAT network.
1
st
Slave
Clock Master
2
nd
Slave
Clock Slave
Master
Clock Slave
3
rd
Slave ... Slave
Clock Slave
Ref Time Ref Time
1) Ref Time Ref Time
Ref Time
Ref Time
Ref Clock
Ref Time
DC Time DC Time DC Time DC Time
Offset Offset Offset Offset
1) Synchronization datagram
Fig. 3.6 DC-topology and synchronization of the EtherCAT network