FSDH321, FSDL321
3
Pin Definitions
Pin Configuration
Figure 3. Pin Configuration (Top View)
Pin Number
Pin Name
Pin Function Description
1
GND
Sense FET source terminal on primary side and internal control ground.
2
Vcc
Positive supply voltage input. Although connected to an auxiliary transform-
er winding, current is supplied from pin 5 (Vstr) via an internal switch during
startup (see Internal Block Diagram section). It is not until Vcc reaches the
UVLO upper threshold (12V) that the internal start-up switch opens and de-
vice power is supplied via the auxiliary transformer winding.
3
Vfb
The feedback voltage pin is the non-inverting input to the PWM comparator.
It has a 0.9mA current source connected internally while a capacitor and op-
tocoupler are typically connected externally. A feedback voltage of 6V trig-
gers over load protection (OLP). There is a time delay while charging
external capacitor Cfb from 3V to 6V using an internal 5uA current source.
This time delay prevents false triggering under transient conditions, but still
allows the protection mechanism to operate under true overload conditions.
4
Ipk
This pin adjusts the peak current limit of the Sense FET. The feedback
0.9mA current source is diverted to the parallel combination of an internal
2.8k
Ω
resistor and any external resistor to GND on this pin to determine the
peak current limit. If this pin is tied to Vcc or left floating, the typical peak cur-
rent limit will be 0.7A.
5
Vstr
This pin connects directly to the rectified AC line voltage source. At start up
the internal switch supplies internal bias and charges an external storage
capacitor placed between the Vcc pin and ground. Once the Vcc reaches
12V, the internal switch is opened.
6, 7, 8
Drain
The drain pins are designed to connect directly to the primary lead of the
transformer and are capable of switching a maximum of 650V. Minimizing
the length of the trace connecting these pins to the transformer will decrease
leakage inductance.
1
2
3
4
5
6
7
8
GND
Vcc
Vfb
Ipk
Vstr
Drain
Drain
Drain
8DIP
8LSOP
