FSDH321, FSDL321
14
Typical Application Circuit
Features
• High efficiency (>70% at full load, full input range)
• Low standby mode power consumption (<1W at DC 375V input and 0.5W load)
• Low component count
• Enhanced system reliability through various protection functions
• Low EMI through frequency modulation
• Internal soft-start (15ms)
Key Design Notes
• The delay time for over load protection is designed to be about 13ms with C104 of 22nF. If faster/slower triggering of OLP
is required, C104 can be changed to a smaller/larger value(eg. 47nF for about 30ms).
• The pule-by-pulse peak current limit level(I
LIM
) is set to default value 0.7A by floating the Ipk pin (#4).
• R102 and C101 clamp the DRAIN voltage of MOSFET below 650V under all conditions.
1. Schematic
Application
Output power
Input voltage
Output voltage (Max current)
PC Auxiliary
Power Supply
10W
DC 140~375V
5.0V (2.0A)
10W PC Auxiliary Power Circuit
T1
EE1625
7
10
D 201
SB360
C 201
1000uF
16V
C 203
470uF
16V
L 201
10uH
5V
(+/-5%)
2A
C101
10nF
630V
1
2
4
5
R 102
100k
Ω
1W
D 101
UF 4007
C104
22nF
C 103
10uF
50V
D 103
1N 4937
R 104
10
Ω
R 202
330
Ω
R 201
1k
Ω
R 203
2k
Ω
C 202
100nF
R 204
2k
Ω
IC 301
H11A817A
IC201
KA431
3
Vfb
Vcc
Drain
GND
6
140~ 375
VDC
INPUT
IC101
FSDx321
6,7,8
1
2
3
R 103
10
Ω
D102
1N 4937
C 102
47uF
50V
M Vcc
C301
2.2nF
Vstr
5
R 101
680k
Ω
1W
ZD1
18V
ZD2
18V
