AN-9111
APPLICATION NOTE
© 2015 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.1
• 6/26/15
17
Therefore, it is desired to maintain this structure without
creating complementary high-side PWM signals. The
capacitance of V
CC
should be sufficient to supply necessary
charge to V
BS
capacitance in all three phases. If a normal
PWM operation starts before V
BS
reaches V
UVLO
reset level,
the high-side MOSFETs cannot switch without creating a
fault signal. It may lead to a failure of motor start in some
applications. If three phases are charged synchronously,
initial charging current through a single shunt resistor may
exceed the over-current protection level.
Therefore, initial charging time for bootstrap capacitors
should be separated, as shown in Figure 20. The effect of
the bootstrap capacitance factor and charging method (low-
side MOSFET driving method) is shown in Figure 18.
V
PN
V
CC
V
BS
V
IN(L)
ON
Start PWM
V
IN(H)
OFF
0V
0V
0V
0V
0V
Section of charge pumping for V
BS
: Switching or Full Turn on
Figure 19.
Timing Chart of Initial Bootstrap Charging
…
…
…
…
…
V
DC
V
CC
Bootstrap capacitor charging(
W
phase)
IN(WL)
IN(VL)
IN(UL)
Bootstrap capacitor charging(
V
phase)
Bootstrap capacitor charging(
U
phase)
Bootstrap capacitor charging period
System operating periode
…
Figure 20.
Recommended Initial Bootstrap Capacitors
Charging Sequence
Figure 21 and Figure 22 shows waveform initial bootstrap
capacitor charging voltage and current.
Figure 21.
Each Part Initial Operating Waveform of
Bootstrap Circuit (Conditions: V
DC
=20 V, V
CC
=15 V,
C
BS
=22
μF, LS MOSFET Turn-on Duty=200 μsec)
Figure 22.
Each Part Operating Waveform of Bootstrap
Circuit (Conditions: V
DC
=20 V, V
CC
=15 V, C
BS
=22
μF, LS
MOSFET Full Turn-on)
6.4.3.
Selection of Bootstrap Capacitor
Considering Operating
The bootstrap capacitance can be calculated by:
where:
Δt: maximum on pulse width of high-side MOSFET;
ΔV
BS
: the allowable discharge voltage of the C
BS
(voltage ripple); and
I
Leak
: maximum discharge current of the C
BS
.
Mainly via the following mechanisms:
Gate charge for turning the high-side MOSFET on
Quiescent current to the high-side circuit in HVIC
Level-shift charge required by level-shifters in HVIC
Leakage current in the bootstrap diode
C
BS
capacitor leakage current (ignored for non-
electrolytic capacitors)
Bootstrap diode reverse recovery charge
Practically, 2 mA of I
Leak
is recommended for FSB44104A
(I
PBS
, operating V
BS
supply current at 20 kHz, is max. 2 mA
in the datasheet). By considering dispersion and reliability,
the capacitance is generally selected to be 2~3 times the
calculated one. The C
BS
is only charged when the high-side
MOSFET is off and the V
S(x)
voltage is pulled down to
ground.
The on-time of the low-side MOSFET must be sufficient to
for the charge drawn from the C
BS
capacitor to be fully
replenished. This creates an inherent minimum on-time of
the low-side MOSFET (or off-time of the high-side
MOSFET).
