FabiaTech FB2642 User Manual Download Page 22

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FabIATech Corporation

J7: Temperature Sensor Header

J13

J11

J10

J12

DB2

CN5

CN4

CN3

CN2

BT1

CN8

CN7

JP1

CN9

CN1

SW1

BZ1

DIMM1

JP2

J14

CN6

LED1

JP1: CMOS Data Clear Jumper

You can use JP1 to clear CMOS data. The CMOS store information like system date,
time, boot up device, password, IRQ… that are set up with the BIOS. To clear the

CMOS, set JP1 to 2-3 and then return to 1-2. The default setting is 1-2.

J13

J11

J10

J12

DB2

CN5

CN4

CN3

CN2

BT1

CN8

CN7

JP1

CN9

CN1

SW1

BZ1

DIMM1

JP2

J14

CN6

LED1

LED1:On-Board Power LED

LED1 indicates power is active when it lights.

J13

J11

J10

J12

DB2

C N5

CN 4

C N 3

C N2

BT1

C N 8

C N7

JP1

CN 9

C N 1

SW 1

BZ1

D IM M 1

JP2

J14

CN 6

LED1

JP1

Clear CMOS Data

3 2 1

Normal Operation

Default

_ +

Resistive Temperature
Sensor Input Header

LED1

Summary of Contents for FB2642

Page 1: ...FabIATech Corporation IPC Solution Website http www fabiatech com Email support fabiatech com FB2642 Socket 370 PIII Celeron Half size CPU Card User s Manual May 2004 Version 1 3 Part Number FB2642 ...

Page 2: ...ng performance or use of this document Trademarks Trademarks brand names and products names mentioned in this publication are used for identification purpose only and are the properties of their respective owners Technical Support If you have problems or difficulties in using the system board or setting up the relevant devices and software that are not explained in this manual please contact our s...

Page 3: ...lock and PCI Clock 7 J1 J5 CPU Fan Connector System Fan Connector 8 J2 USB Connector 8 J13 Reset Header 9 J9 Power LED Header 9 J11 HDD LED Header 9 CN2 CN3 Keyboard Mouse Connector 10 CN5 RJ45 LAN Connector 10 CN8 CN9 IDE hard Disk Connector 11 DB1 CN4 RS232 Serial Ports 1 2 Connectors and Jumpers 12 CN6 26 pin Parallel Port Connector 14 CN7 Floppy Connector 15 BZ1 J10 On Board Buzzer External Sp...

Page 4: ...L SETUP 37 Hardware Monitor Setup 40 Password Setup 41 Chapter 4 Driver and Utility 43 VGA Driver for WIN98 WIN95 43 BIOS Flash Utility 44 LAN Utility 44 Watchdog Timer 45 Watchdog Timer Setting 46 Watchdog Timer Enable Trigger 47 Watchdog Timer Disabled 48 Programming RS 485 48 Chapter 5 Technical Reference 53 Trouble Shooting for Error Messages 53 Technical Reference 56 Real Time Clock and Non V...

Page 5: ...Serial Ports 62 Parallel Ports 66 Appendix 69 Dimension 69 Special Features 70 J3 Feature Connector J3 44 pin 2 0mm IDC 70 v ...

Page 6: ......

Page 7: ...up to 512MB and on board VGA port uses the 815E chipset with UMA share memory with 4MB caching buffer Each FB2642 has two ports for I O communications One RS 232C and one RS 232C 422 485 IrDA ports are available There is also a watchdog timer that can be configured from software to automatically reset the system or generate an interrupt And for easy configuration AMI BIOS are available Power manag...

Page 8: ...FabIATech Corporation Layout J13 J11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 CN3 CN2 BT1 J3 J5 J1 CN8 CN7 JP1 CN9 CN1 SW1 BZ1 DIMM1 JP2 J14 CN6 LED1 2 ...

Page 9: ...ng buffer Parallel port floppy and two IDE channels supports four IDE devices with ultra DMA 33 In addition channel one IDE supports ultra DMA 33 66 100 One RS 232 and one RS 232 RS 422 RS 485 IrDA PS 2 compatible keyboard and mouse interface E2KEY function for safe CMOS data keeping Option On board buzzer and LED indicator Flash BIOS with easy upgrade utility Software programmable watchdog timer ...

Page 10: ...42 system board Note after you install the FB2642 it is recommended that you keep the diskette or CD that contains drivers and document files document copies and unused cables in the cartoon for future use The following lists the accessories that may be included in your FB2642 package Some accessories are optional items that are only shipped upon order One FB2642 system board One compact disc cont...

Page 11: ...rap to prevent the generation of Electricity Static Discharge ESD The ESD may be created from human body that touches the board It may do damage to the board circuit 2 Install or unplug any connector module or add on card be sure that the power is disconnected from the system board If not this may damage the system board components module or the add on card 3 Installing a heat sink and cooling fan...

Page 12: ...ling fan J2 USB connector J3 External Bus for Piggyback place with Lam audio Panel Link J4 3 pin RS232C touch screen header for serial port 2 J6 5 pin for TTL I O J7 2 pin for external temperature sensor J8 2 pin for external TX LED with LAN J9 3 pin for External power LED header BZ1 J10 Onboard Buzzer and external speaker header J11 2 pin HDD LED Indicator header J12 5 pin RS232C IrDA header for ...

Page 13: ...ck PCI Clock Remark Off Off 133 MHz 33 MHz Tualatlin Off On Reserved Reserved On Off 100Mhz 33Mhz Default On On 66Mhz 33Mhz Caution 1 Avoid any of the following conditions that will directly destroy or severely cause damage to your CPU or make your system unstable if you select an inappropriate base clock Coppermine CPUs Celeron over 66 MHz CPU base clock and PIII over 100 133 MHz CPU base clock P...

Page 14: ...scription 1 Ground 2 12V 3 Speed In 1 J1 J5 3 J2 USB Connector J2 is a 10 pin connector Use included adapter cable Optional for transfering to standard double port USB connector J13 J11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 CN3 CN2 BT1 J3 J5 J1 CN8 CN7 JP1 CN9 CN1 SW1 BZ1 DIMM1 JP2 J14 CN6 LED1 J2 2 1 10 9 J2 Signal J2 Signal 1 USBV0 2 Case Ground 3 USBD0 4 USBG1 5 USBD0 6 USBD1 7 USBG0 8 USBD1 9 ...

Page 15: ...4 J2 CN3 CN2 BT1 J3 J5 J1 CN8 CN7 JP1 CN9 CN1 SW1 BZ1 DIMM1 JP2 J14 CN6 LED1 J9 Power LED Header J13 J11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 CN3 CN2 BT1 J3 J5 J1 CN8 CN7 JP1 CN9 CN1 SW1 BZ1 DIMM1 JP2 J14 CN6 LED1 J11 HDD LED Header J13 J11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 CN3 CN2 BT1 J3 J5 J1 CN8 CN7 JP1 CN9 CN1 SW1 BZ1 DIMM1 JP2 J14 CN6 LED1 J13 2 1 Pin1 Reset Pin2 Reset J9 3 1 Pin 1 Power...

Page 16: ...CN5 contain LAN twist pair signals and LAN accesses indicator signal is RJ45 type connector with 2 LED indicators The up side LED orange indicates data is accessing and the down side LED green indicates on line status When lighted indicates on line and off indicates off line J13 J11 J10 J8 J7 J6 J3 CN8 CN9 J12 J9 DB2 J4 CN5 CN4 J2 CN3 CN2 BT1 J5 J1 CN7 JP1 CN1 SW1 BZ1 DIMM1 JP2 J14 CN6 LED1 RJ45 S...

Page 17: ...1 CN9 Hard disk connector 1 2 39 40 The following table lists the pin description of CN8 CN9 Pin Signal Pin Signal 1 RESET 2 GROUND 3 DATA 7 4 DATA 8 5 DATA 6 6 DATA 9 7 DATA 5 8 DATA 10 9 DATA 4 10 DATA 11 11 DATA 3 12 DATA 12 13 DATA 2 14 DATA 13 15 DATA 1 16 DATA 14 17 DATA 0 18 DATA 15 19 GROUND 20 NOT USED 21 IDEDREQ 22 GROUND 23 IOW 24 GROUND 25 IOR 26 GROUND 27 IDEIORDYA 28 GROUND 29 DACKA ...

Page 18: ... to enable or disable terminator if RS 485 mode is selected Serial port 2 also could be configured as Infra IrDA interface by changing the setting in BIOS setup program J12 is use to interface with Infra module When touch screen module is used you could connect J4 to touch screen controller directly and internally instead of connect from CN4 connector J13 J11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 ...

Page 19: ...11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 CN3 CN2 BT1 J3 J5 J1 CN8 CN7 JP1 CN9 CN1 SW1 BZ1 DIMM1 JP2 J14 CN6 LED1 J4 Touch Screen Header J4 provide basic RS 232C signals of serial port 2 respectively The basic RS 232C signal is used to interface with touch screen controller internally J13 J11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 CN3 CN2 BT1 J3 J5 J1 CN8 CN7 JP1 CN9 CN1 SW1 BZ1 DIMM1 JP2 J14 CN6 LE...

Page 20: ...7 JP1 CN9 CN1 SW1 BZ1 DIMM1 JP2 J14 CN6 LED1 CN6 CN6 DB 25 Signal CN6 DB 25 Signal 1 1 STROBE 2 14 AUTO FORM FEED 3 2 DATA 0 4 15 ERROR 5 3 DATA 1 6 16 INITIALIZE 7 4 DATA 2 8 17 PRINTER SELECT IN 9 5 DATA 3 10 18 Ground 11 6 DATA 4 12 19 Ground 13 7 DATA 5 14 20 Ground 15 8 DATA 6 16 21 Ground 17 9 DATA 7 18 22 Ground 19 10 ACKNOWLEDGE 20 23 Ground 21 11 BUSY 22 24 Ground 23 12 PAPER 24 25 Ground...

Page 21: ...34 pin Signal 2 Drive Enable A 23 Ground 8 Index 24 Write Enable 12 Select A 26 Track 0 11 Ground 28 Write Protect 16 Motor A 29 Ground 14 Select B 30 Read Data 10 Motor B 31 Ground 9 Ground 32 Head 18 Direction 33 NC 20 Step 34 Disk Change 22 Write Data Others No Connection BZ1 J10 On Board Buzzer External Speaker Header J13 J11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 CN3 CN2 BT1 J3 J5 J1 CN8 CN7 J...

Page 22: ...et up with the BIOS To clear the CMOS set JP1 to 2 3 and then return to 1 2 The default setting is 1 2 J13 J11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 CN3 CN2 BT1 J3 J5 J1 CN8 CN7 JP1 CN9 CN1 SW1 BZ1 DIMM1 JP2 J14 CN6 LED1 LED1 On Board Power LED LED1 indicates power is active when it lights J13 J11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 CN3 CN2 BT1 J3 J5 J1 CN8 CN7 JP1 CN9 CN1 SW1 BZ1 DIMM1 JP2 J14 ...

Page 23: ...3 Input Line 0 Bit 4 of 191h 4 Input Line 1 Bit 5 of 191h 5 Ground CN1 Power Connector 9 pin 2 54mm JST CN1 is the power connector for FB2642 is used with stand alone applications J13 J11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 CN3 CN2 BT1 J3 J5 J1 CN8 CN7 JP1 CN9 CN1 SW1 BZ1 DIMM1 JP2 J14 CN6 LED1 CN1 CN1 Signal CN1 Signal 1 5V 6 Ground 2 5V 7 Ground 3 Ground 8 5V 4 Ground 9 5V 5 12V Note This powe...

Page 24: ... FB2642 supports a CRT colored monitor It can be connected to create a compact video solution for the industrial environment The VGA control in the 815E chipset and supports AGP the VGA memory is UMA memory with 4MB caching buffer allows a maximum CRT resolution of 1280X1024 with 24bpp colors The CRT is use to a standard CRT connector DB2 J13 J11 J10 J8 J7 J12 J9 DB2 J6 J4 CN5 CN4 J2 CN3 CN2 BT1 J...

Page 25: ... firmware that interacts directly with the hardware components and facilitates interaction between the system hardware and the operating system The BIOS default values ensure that the system will function at its normal capability In the worst situation the user may have corrupted the original settings set by the manufacturer All the changes you make will be saved in the system RAM and will not be ...

Page 26: ...1 Auto Configuration with Optimal Settings to auto configure the system according to optimal setting with pre defined values This is also the factory default setting of the system when you receive the board 12 Auto Configuration with Fail Safe Settings to configure the system in fail safe mode with predefined values 13 Save Settings and Exit perform this function when you change the setting and ex...

Page 27: ...xit the current menu or message Page Up Page Down To select a parameter F1 To display the help menu if you do not know the purpose or function of the item you are going to configure F2 F3 To change the color of the menu display F2 is to go forward and F3 is to go backward UP Down Arrow Keys To go upward or downward to the desired item 21 ...

Page 28: ...o set the current date Follow the hour minute and second format The user can bypass the date and time prompts by creating an AUTOEXEC BAT file For information on how to create this file please refer to the MS DOS manual Floppy Setup The Standard CMOS Setup option records the types of floppy disk drives installed in the system To enter the configuration value for a particular drive highlight its co...

Page 29: ...you must configure the hard disk drive in the standard method as described above by the USER option Boot Sector Virus Protection This option protects the boot sector and partition table of your hard disk against accidental modifications Any attempt to write to them will cause the system to halt and display a warning message If this occurs you can either allow the operation to continue or use a boo...

Page 30: ...ault settings Quick Boot This field is used to activate the quick boot function of the system When set to Enabled 1 BIOS will not wait for up to 40 seconds if a Ready signal is not received from the IDE drive and will not configure its drive 2 BIOS will not wait for 0 5 seconds after sending a RESET signal to the IDE drive 3 You cannot run BIOS Setup at system boot since there is no delay for the ...

Page 31: ...l Display Mode This field specifies can set Normal POST screen BIOS or Boot with logo no POST messages Client Floppy Access Control This field specifies the read write access when booting from a floppy drive Available options Normal Read only Default setting Normal Hard Disk Access Control This field specifies the read write access when booting from a HDD drive Available options Normal Read only D...

Page 32: ... Drive Seek This field is used to set if the BIOS will seek the floppy A drive upon boot Available Options Disabled Enabled Default setting Disabled PS 2 Mouse Support The setting of Enabled allows the system to detect a PS 2 mouse on boot up If detected IRQ12 will be used for the PS 2 mouse IRQ 12 will be reserved for expansion cards if a PS 2 mouse is not detected Disabled will reserve IRQ12 for...

Page 33: ...system is used and the system RAM is over 64MB please select yes Otherwise select No Available options Yes No Default setting No Wait for F1 If Error AMIBIOS POST error messages are followed by Press F1 to continue If this field is set to Disabled the AMIBIOS does not wait for you to press the F1 key after an error message Available options Disabled Enabled Default setting Disabled Hit DEL Message...

Page 34: ...ntents of the video ROM cannot be read from or written to cache memory 2 Enabled The contents of C000h C7FFFh are written to the same address in system memory RAM for faster execution 3 Cached WP The contents of the named ROM area are written to the same address in system memory RAM for faster execution if an adapter ROM will be using the named ROM area Also the contents of the RAM area can be rea...

Page 35: ...he installed SDRAM supports SPD function select SPD If not you can select based on other access time of the SDRAM Available Options Disabled Enabled Default setting Disabled DRAM Refresh This specifies the DRAM refresh rate Available Options 15 6 11 7 us 7 8 5 85 us and 1 28 0 96 us Default setting 15 6 11 7 us DRAM Cycle Time SCLKs This field specifies control the number of DRAM for an access cyc...

Page 36: ...the Synchronous DRAM access cycle when SDRAM is installed Available Options 3 2 Default setting 3 Internal Graphics Mode Select This field Enable Disable the internal graphics device and selects the amount of main memory that is dedicated to support the internal graphics device in VGA non linear mode only Available Options 512kB 1MB and Disable Default setting 1 MB Graphics Aperture Size This fiel...

Page 37: ...system will not be able to use a USB device Available Options Disabled Enabled Default setting Enabled USB Device Legacy Support Select All Device if a USB device is installed to the system If Disabled are selected the system will not be able to use a USB device Available Options Disabled Mice and All Devices Default setting All Devices 31 ...

Page 38: ...is field specifies the power conserving state that video subsystem enters after the specified period of display inactivity has expired Available Options Disabled Standby Suspend Default setting Disabled Hard Disk Power Down Mode This field specifies the power conserving state that the hard disk drive enters after the specified period of hard drive inactivity has expired Available Options Disabled ...

Page 39: ...y power state Available Options Disabled 1 Minute 2 Minute 4 Minute and 8 Minute Default setting Disabled Suspend Time Out Minute This field specifies the length of a period of system inactivity like hard disk or video while in Standby state When this length of time expires the system enters Suspend power state Available Options Disabled 1 Minute 2 Minute 4 Minute and 8 Minute up to 60 Minute Defa...

Page 40: ...cy Timer This field specifies the latency timings in PCI clock PCI devices installed in the PCI expansion bus Available Options 32 64 96 128 160 192 224 and 248 Default setting 64 Primary Graphics Adapter This field specifies which VGA display will be used when the system is boot You can select either the onboard AGP or the VGA card installed on the PCI bus Available Options AGP PCI Default settin...

Page 41: ...e Allocate IRQ to PCI AGP When a PCI or AGP VGA device is installed you can assign an IRQ to this device Selecting Yes BIOS will auto assign IRQ to the device Selecting No no IRQ will be assigned to the VGA device Available Options Yes No Default setting No PCI IDE BusMaster This option is to specify that the IDE controller on the PCI local bus have bus mastering capability Available Options Enabl...

Page 42: ...em interrupt as one of the following types based on the type of device using the interrupt ISA EISA devices comply with the original PC AT bus specification requiring a specific interrupt Such as IRQ5 for COM1 PnP PCI ISA devices comply with the Plug and Play standard whether designed for PCI or ISA bus architecture 36 ...

Page 43: ...ault setting Auto OnBoard Serial Port 1 These fields select the I O port address for each Serial port Refer to Table 2 2 Available Options Auto Disabled 3F8H COM1 2F8H COM2 and 3E8H COM3 2E8H COM4 Default setting Auto OnBoard Serial Port 2 These fields select the I O port address for each Serial port Refer to Table 2 2 Available Options Auto Disabled 3F8H COM1 2F8H COM2 and 3E8H COM3 2E8H COM4 Def...

Page 44: ...Parallel Port IRQ This field specifies the IRQ for the parallel port Available Options Auto N A 5 7 Default setting Auto Parallel Port DMA Channel This option is only available if the setting for the parallel Port Mode option is ECP Available Options N A 0 1 3 Default setting N A Read Com Port Mode State These fields are auto detected SW1 4 Setting that can set use BIOS or adjust SW1 Available Opt...

Page 45: ...IATech Corporation On Chip IDE This field specifies the IDE channel that can be applied when using CN3 IDE hard disk connector Available Options Disabled Primary and Secondary Both Default setting Both 39 ...

Page 46: ...age and CPU fan speed System Hardware Monitor In this field you can monitor or detect the followings items These items are view only and cannot be changed Current CPU Temperature Current System Temperature Current Ext Temperature Fan1 Speed Fan2 Speed CPU1 VCORE CPU2 VCORE 1 800V 2 500V 3 300V 5 000V 12 00V 12 00V VBAT On board Battery 40 ...

Page 47: ...Supervisor password is set up 4 Enter Advanced CMOS Setup screen and point to the Password Checkup field 5 Select Always or Setup Always a visitor who attempts to enter BIOS or operating system will be prompted for password Setup a visitor who attempts to the operating system will be prompted for user password You can enter either User password or Supervisor password 6 Point to Save Settings and E...

Page 48: ...FabIATech Corporation 42 ...

Page 49: ...ype Press any key to enter the main menu Step 4 As the setup is completed the system will generate the message as follows Yes I want to restart my computer now Installation is done No I will restart my computer later System must be restart then complete the installation Step 5 In the WINDOWS98 ME you can find the DISPLAYL icon located in the CONTROL PANEL group Step 6 Adjust the Refresh Rate Font ...

Page 50: ...h is the newest program user can use it to modify BIOS function in the future when the BIOS add some functions LAN Utility Step 1 To install the LAN utility OR driver insert the CD ROM into the CD ROM device and enter DRIVER LAN RTL8139C DIAG If your system is not equipped with a CD ROM device copy the LAN VGA driver from the CD ROM to a 1 44 diskette Step 2 Execute install exe file Note In the LA...

Page 51: ...eset signal to reset the system The time out period can be programmed to be set from 1 to 255 seconds or minutes Watchdog Register Time Base Counter and Compartor ADD A0 A15 Data D D7 Watchdog LED RESET The CD ROM includes a Watch Dog demo file In the file there are 3 execution programs written in different forms The sub directories of the file are 1 WATCHDOG ASSEMBLE Library and Test Program writ...

Page 52: ...t to non zero value to watchdog counter and start to count down again If your program fails to trigger the watchdog timer before time out it will generate a reset pulse to reset the system The factor of the watchdog timer time out constant is approximately 1 seconds The period for the watchdog timer time out is between 1 to FF timer factors If you want to reset your system when watchdog times out ...

Page 53: ...g You can change the time out period by writing another timer factor to the watchdog register at any time and you must trigger the watchdog before the new time out period in the next trigger Below is a Turbo C program which demonstrates how to trigger the watchdog timer include stdio H include WDLIB H main char WD_TIME ox6 InitWD equWdUnitS printf Enable watchdog Trigger watchdog Timer Output is 6...

Page 54: ...The majority communicative operation of the RS 485 is in the same of the RS 232 When the RS 485 precedes the transmission which needs control the TXC signal and the installing steps are as follows Step 1 Enable TXC Step 2 Send out data Step 3 Waiting for data empty Step 4 Disable TXC Note Please refer to the section of the Serial Ports in the Chapter Technical Reference for the detail description ...

Page 55: ...the current COM port address Step 3 Wait for the buffer s data empty Check transmitter holding register THRE bit 5 of the address of offset 5 and transmitter shift register TSRE bit 6 of the address of offset 5 are all sets must be 0 Step 4 Disabled TXC signal and the bit 0 of the address of offset 4 sets 0 Send out one block data Transmit the data more than two characters Step 1 Enable TXC signal...

Page 56: ...INP H3FC AND HFA 40 RETURN b Send out one character to COM1 10 REM Enable transmitter by setting DTR ON 20 OUT H3FC INP H3FC OR H01 30 REM Send out one character 40 PRINT 1 OUTCHR 50 REM Check transmitter holding register and shift register 60 IF INP H3FD AND H60 0 THEN 60 70 REM Disable transmitter by resetting DTR 80 OUT H3FC INP H3FC AND HEF 90 RETURN c Receive one character from COM1 10 REM Ch...

Page 57: ...aracter from COM1 buffer 70 INPSTR INPUT 1 1 80 RETURN NOTE The example of the above program is based on COM1 I O Address 3F8h The RS 422 RS 485 of the FB2642 uses COM2 If you want to program it please refer to the BIOS Setup for COM2 address setup 51 ...

Page 58: ...FabIATech Corporation 52 ...

Page 59: ...ts and connectors are in proper position and firmly attached If the errors still exist please contact with your distributor for maintenance POST BEEP Currently there are two kinds of beep codes in BIOS setup One indicates that a video error has occurred and the BIOS cannot initialize the video screen to display any additional information This beep code consists of a single long beep followed by th...

Page 60: ... formatted Then reboot the system DISKETTE DRIVES OR TYPES MISMATCH ERROR When the diskette drive type is different from CMOS please run setup or configure the drive again ERROR ENCOUNTERED INITIALIZING HARD DRIVE When you can t initialize the hard drive ensure the following things 1 The adapter is installed correctly 2 All cables are correctly and firmly attached 3 The correct hard drive type is ...

Page 61: ...d or removed since last boot In EISA mode use Configuration Utility to re configure the memory configuration In ISA mode enter BIOS Setup and enter the new memory size in the memory fields MEMORY VERIFYING ERROR It indicates an error verifying a value is already written to memory Use the location along with your system s memory map to locate the bad chip OFFENDING ADDRESS MISSING This message is u...

Page 62: ...n be maintained for long periods of time using an internal Lithium battery The contents of each byte in the CMOS RAM are listed below Address Description 00 Seconds 01 Second alarm 02 Minutes 03 Minute alarm 04 Hours 05 Hour alarm 06 Day of week 07 Date of month 08 Month 09 Year 0A Status register A 0B Status register B 0C Status register C 0D Status register D 0E Diagnostic status byte 0F Shutdow...

Page 63: ...ion memory byte 18 High expansion memory byte 19 2D Reserved 2E 2F 2 byte CMOS checksum 30 Low actual expansion memory byte 31 High actual expansion memory byte 32 Date century byte 33 Information flags set during power on 34 7F Reserved for system BIOS 57 ...

Page 64: ...led 1 Enabled 15h Base Memory in 1KB increments Low Byte 16h Base Memory in 1KB increments High Byte 17h IBM compatible memory in 1KB increments Low Byte 18h IBM compatible memory in 1KB increments High Byte max 15 MB 19h 2Dh Varies 2Eh Standard CMOS RAM checksum high byte 2Fh Standard CMOS RAM checksum low byte 30h IBM compatible Extended Memory Low Byte POST in KB 31h IBM compatible Extended Mem...

Page 65: ...er 060h 064h Keyboard Controller 070h 071h Real Time Clock NMI 080h 09Fh DMA Page Register 0A0h 0A1h Interrupt Controller 2 0C0h 0DFh DMA Controller 2 0F0h Clear Math Coprocessor Busy Signal 0F1h Reset Math Coprocessor 1F0h 1F7h IDE Interface 278 27F Parallel Port 2 LPT2 2F8h 2FFh Serial Port 2 COM2 378h 3FFh Parallel Port 1 LPT1 360 36F Network Ports 3B0 3BF Monochrome Printer adapter 3C0 3CF EGA...

Page 66: ...quired The following table shows the IRQ used by the devices on the Industrial CPU Card Level Function IRQ0 System Timer Output IRQ1 Keyboard IRQ2 Interrupt Cascade IRQ3 Serial Port 2 IRQ4 Serial Port 1 IRQ5 Ethernet IRQ6 Floppy Disk Controller IRQ7 Parallel Port 1 IRQ8 Real Time Clock IRQ9 Reserved IRQ10 SMBus IRQ11 USB IRQ12 PS2 Mouse IRQ13 Math coprocessor IRQ14 Primary IDE IRQ15 Secondary IDE ...

Page 67: ...ention The two DMA controllers are internally cascaded to provide four DMA channels for transfers to 8 bit peripherals DMA1 and three channels for transfers to 16 bit peripherals DMA2 DMA2 channel 0 provides the cascade interconnection between the two DMA devices thereby maintaining IBM PC AT compatibility The following is the system information of DMA channels DMA Controller 1 DMA Controller 2 Ch...

Page 68: ...ntrol capability and a processor interrupt system that may be software tailored to the computing time required to handle the communications link The following table is a summary of each ACE accessible register DLAB Port Address Register Receiver buffer read 0 Base 0 Transmitter holding register write 0 Base 1 Interrupt enable X Base 2 Interrupt identification read only X Base 3 Line control X Base...

Page 69: ... 0 if Interrupt Pending Bit 1 Interrupt ID Bit 0 Bit 2 Interrupt ID Bit 1 Bit 3 Must be 0 Bit 4 Must be 0 Bit 5 Must be 0 Bit 6 Must be 0 Bit 7 Must be 0 Line Control Register LCR Bit 0 Word Length Select Bit 0 WLS0 Bit 1 Word Length Select Bit 1 WLS1 WLS1 WLS0 Word Length 0 0 5 Bits 0 1 6 Bits 1 0 7 Bits 1 1 8 Bits Bit 2 Number of Stop Bit STB Bit 3 Parity Enable PEN Bit 4 Even Parity Select EPS ...

Page 70: ...be 0 Line Status Register LSR Bit 0 Data Ready DR Bit 1 Overrun Error OR Bit 2 Parity Error PE Bit 3 Framing Error FE Bit 4 Break Interrupt BI Bit 5 Transmitter Holding Register Empty THRE Bit 6 Transmitter Shift Register Empty TSRE Bit 7 Must be 0 MODEM Status Register MSR Bit 0 Delta Clear to Send DCTS Bit 1 Delta Data Set Ready DDSR Bit 2 Training Edge Ring Indicator TERI Bit 3 Delta Receive Li...

Page 71: ... MS LS MS Bit 0 Bit 0 Bit 8 Bit 1 Bit 1 Bit 9 Bit 2 Bit 2 Bit 10 Bit 3 Bit 3 Bit 11 Bit 4 Bit 4 Bit 12 Bit 5 Bit 5 Bit 13 Bit 6 Bit 6 Bit 14 Bit 7 Bit 7 Bit 15 Desired Baud Rate Divisor Used to Generate 16x Clock 300 384 600 192 1200 96 1800 64 2400 48 3600 32 4800 24 9600 12 14400 8 19200 6 28800 4 38400 3 57600 2 115200 1 65 ...

Page 72: ...achment of various devices that accept eight bits of parallel data at standard TTL level Data Swapper The system microprocessor can read the contents of the printer s Data Latch through the Data Swapper by reading the Data Swapper address Printer Status Buffer The system microprocessor can read the printer status by reading the address of the Printer Status Buffer The bit definitions are described...

Page 73: ...other Normally this signal will be active for approximately 5 microseconds before receiving a BUSY message stops Bit 5 A 1 means the printer has detected the end of the paper Bit 4 A 1 means the printer is selected Bit 3 A 0 means the printer has encountered an error condition data Printer Control Latch Printer Control Swapper The system microprocessor can read the contents of the printer control ...

Page 74: ...in this position allows an interrupt to occur when ACK changes from low state to high state Bit 3 A 1 in this bit position selects the printer Bit 2 A 0 starts the printer 50 microseconds pulse minimum Bit 1 A 1 causes the printer to line feed after a line is printed Bit 0 A 0 5 microsecond minimum highly active pulse clocks data into the printer Valid data must be present for a minimum of 0 5 mic...

Page 75: ...FabIATech Corporation Appendix Dimension 184 9 4 1 18 4 6 4 6 121 9 13 8 5 1 4 6 8 8 23 4 24 5 24 6 Unit mm 69 ...

Page 76: ...mn main Video signals for panel link Note 3 A in G column main AC97 signals for audio Note 4 L in G column main LAN signals for Intel PHY Pin J3 G Pin J3 G 1 5V P 2 5V P 3 CLK0 V 4 CLK1 V 5 VSYNC V 6 HSYNC V 7 LTVD0 V 8 LTVD1 V 9 LTVD2 V 10 LTVD3 V 11 LTVD4 V 12 LTVD5 V 13 LTVD6 V 14 LTVD7 V 15 LTVD8 V 16 LTVD9 V 17 LTVD10 V 18 LTVD11 V 19 FTBLNK V 20 STALL V 21 FTSCL V 22 FTSDA V 23 ACRST A 24 BI...

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