X
X
R
R
P
P
7
7
7
7
4
4
0
0
E
E
V
V
B
B
-
-
H
H
I
I
C
C
F
F
o
o
u
u
r
r
C
C
h
h
a
a
n
n
n
n
e
e
l
l
D
D
i
i
g
g
i
i
t
t
a
a
l
l
P
P
W
W
M
M
D
D
e
e
m
m
o
o
B
B
o
o
a
a
r
r
d
d
s
s
© 2013 Exar Corporation
4/18
Rev. 1.0.0
Name
Pin Number
Description
DVDD
2
Input for powering the internal digital logic. This pin should be connected to AVDD.
DGND
10
Digital Ground. This pin should be connected to the ground plane at the exposed pad with
a separate trace.
AGND
11
Analog Ground. This pin should be connected to the ground plane at the exposed pad with
a separate trace
GL1-GL4
34,30,17,22 Output pin of the low side gate driver. Connect directly to the respective gate of an
external N-channel MOSFET.
GH1-GH4
33,28,19,24 Output pin of the high side gate driver. Connect directly to the respective gate of an
external N-channel MOSFET.
LX1-LX4
34,29,23,18
Lower supply rail for the high-side gate driver (GHx). Connect this pin to the switching
node at the junction between the two external power MOSFETs and the inductor. These
pins are also used to measure voltage drop across bottom MOSFETs in order to provide
output current information to the control engine.
BST1-BST4
32,27,20,25
High side driver supply pin(s). Connect BST to an external boost diode and a capacitor as
shown in the front page diagram.
The high side driver is connected between the BST pin and LX pin.
GPIO0-GPIO3
3,4,5,6
These pins can be configured as inputs or outputs to implement custom flags, power good
signals and enable/disable controls. A GPIO pin can also be programmed as an input clock
synchronizing IC to external clock. Refer to the “GPIO Pins” Section and the “External
Clock Synchronization” Section for more information.
GPIO4_SDA,
GPIO5_SCL
7,8
I
2
C serial interface communication pins. These pins can be re-programmed to perform
GPIO functions in applications when I
2
C bus is not used.
VOUT1-VOUT4
12,13,14,15 Voltage sense.
Connect to the output of the corresponding power stage.
LDOOUT
40
Output of the Standby LDO. It can be configured as a 5V or 3.3V output. A compensation
capacitor should be used on this pin [see Application Note].
ENABLE
9
If ENABLE is pulled high, the chip powers up (logic reset, registers configuration loaded,
etc.). If pulled low for longer than 100us, the XRP7708/40 is placed into shutdown. See
applications section for proper sequencing of this pin.
AGND
Exposed Pad Analog Ground. Connect to analog ground (as noted above for pin 11).
ORDERING INFORMATION
This board may be ordered from Exar as part XRP7740EVB-HIC. Refer
www.exar.com
for exact, up
to date ordering information.
