Chapter 3 BIOS Setup
104-1649CLD2NA Series
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Power Management Configuration
BIOS SETUP UTILITY
Power Management Configuration
ACPI Aware O/S
[Yes]
←→
Select Screen
↑↓
Select Item
+ - Change Field
F1 General Help
F10 Save and Exit
ESC Exit
V02.57 (c)Copyright 1985-2004, American Megatrends, Inc.
ACPI Aware O/S
This option is used to provide support for ACPI mode.
Chipset
BIOS SETUP UTILITY
Advanced Chipset Settings
WARNING:Setting wrong values in below sections may
NorthBridge Configuration
Configure DRAM Timing by SPD
[Enabled]
Internal Graphics Mode
[Disabled]
Internal Graphics Memory
[24]
Boot Display Type
[Panel+CRT]
Flat Panel Resolution
[800x600]
Flat Panel Data Bus Type
[9-24 bits, 1
Hoizontal Sync Polarity
[Active low]
Vertical Sync Polarity
[Active low]
SouthBridge Configuration
Onboard Audio Controller
[Enabled]
←→
Select Screen
↑↓
Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
V02.57 (c)Copyright 1985-2004, American Megatrends, Inc.
Configure DRAM Timing by SPD
Configure of the memory controller according to the time sequence of the
SPD chip on DRAM. It is recommended to use Enabled here. Manual