10
Application
Note
J19 TFT Digital Interface Signal Description
The digital TFT interface signals are described in the following table:
SIGNAL NAME
Description
Electrical Characteristics
Dot Clock
Pixel Port Clock
Dot Clock is the pixel dot clock output. It clocks the pixel data.
TTL 8mA V
HMAX
= 3.3V
FP_HSYNC
Flat Panel Horizontal Sync
Flat Panel Horizontal Sync establishes the line rate and
horizontal
Retrace interval for a TFT display.
TTL 8mA V
HMAX
= 3.3V
FP_VSYNC
Flat Panel Vertical Sync
Flat Panel Vertical Sync establishes the screen refresh rate
and vertical retrace interval for a TFT display.
TTL 8mA V
HMAX
= 3.3V
ENA_DISP
Display Enable
Display Enable indicates the active display portion of a scan
line.
TTL 8mA V
HMAX
= 3.3V
VDD ENABLE
TTL 8mA V
HMAX
= 3.3V
DATA ENABLE
This is a data valid signal
TTL 8mA V
HMAX
= 3.3V
BACKLIGHT
ENABLE
This is a useful signal which allow you to control the switching
on-off of the lamps
TTL 8mA V
HMAX
= 3.3V
RED[5:0]
Graphics Red Pixel Data Bus
This bus drives graphics pixel data synchronous to the Dot
Clock output.
TTL 8mA V
HMAX
= 3.3V
GREEN[5:0]
Graphics Green Pixel Data Bus
This bus drives graphics pixel data synchronous to the Dot
Clock output.
TTL 8mA V
HMAX
= 3.3V
BLUE[5:0]
Graphics Blue Pixel Data Bus
This bus drives graphics pixel data synchronous to the Dot
Clock output.
TTL 8mA V
HMAX
= 3.3V
VDD
Power Supply
+5V +/- 5%
GND
Ground
Ground
Table 4.
Signal Description - Electrical Characteristics
