EUROLOGIC SANbloc MAN-FC2000-RAID, Installation Manual

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Hardware Information
17
Main Processor
The FC2500 RAID controller uses the 233MHz Intel SA
110 StrongARM processor.
Control Store
Memory
The FC2500 RAID controller implements separate control
store and data cache memory. The control store memory is
dedicated to the processor and is located on the processor
local bus. The control store memory includes a 32MB 100
Mhz 36-bit parity-protected SDRAM
Flash PROM
One 2MB flash PROM is provided on the controller board
for non-volatile storage of the operating program. The
SA100 boots from this Flash PROM space.
The Flash PROM device is preprogrammed in manufac-
turing, but can be updated via firmware download utilities.
In the event that a Flash PROM loses all of its contents,
including its download utilities, a Flash Emulator board can
be attached to the controller and the Flash PROM can be
restored by running code on the Emulator Board.
Scalable Cache
Memory
The FC2500 RAID controller implements scalable data
cache memory on the controller and utilizes ECC protected
SDRAM. A single DIMM location accepts Eurologic-
qualified, 168-pin, 72-data bit, 100MHz, 3.3V, SDRAM
DIMMs. The controller design supports memory capacities
128MB and 256MB. Cache memory is also protected by the
Battery Backup Unit (BBU).
UART
One UART provides a debug port operating at 19.2Kbps.
This port is used only for development and some field debug
situations.