Connector Assignments
Pin
Signal Name
Notes
Alternative Signal Name
Notes
Differential Pair
(XILINX Name)
Notes
33
FPGA-IO<32>
3.3V or 2.5V, IO
LVDS_B34_4_N
34
FPGA-IO<33>
3.3V or 2.5V, IO CAN0_TX
3.3V, O
LVDS_B34_18_N
35
FPGA-IO<34>
3.3V or 2.5V, IO
LVDS_B34_4_P
36
FPGA-IO<35> 3.3V or 2.5V, IO CAN0_RX
5V, I
LVDS_B34_18_P
CLK Input
37
FPGA-IO<36>
3.3V or 2.5V, IO
LVDS_B34_11_N
38
FPGA-IO<37> 3.3V or 2.5V, IO CAN1_TX
3.3V, O
LVDS_B34_10_N
CLK Input
39
FPGA-IO<38>
3.3V or 2.5V, IO
LVDS_B34_11_P
40
FPGA-IO<39> 3.3V or 2.5V, IO CAN1_RX
5V, I
LVDS_B34_10_P
41
FPGA-IO<40>
3.3V or 2.5V, IO
LVDS_B34_19_N
42
FPGA-IO<41>
3.3V or 2.5V, IO GND (when using CAN 0 or 1 )
GND
LVDS_B34_21_N
43
FPGA-IO<42>
3.3V or 2.5V, IO GND (when using CAN 0 or 1 )
GND
LVDS_B34_19_P
44
FPGA-IO<43>
3.3V or 2.5V, IO TxS0
RS232, O
LVDS_B34_21_P
45
FPGA-IO<44>
3.3V or 2.5V, IO
LVDS_B34_24_N
46
FPGA-IO<45>
3.3V or 2.5V, IO RxS1
RS232, I
LVDS_B35_24_N
47
FPGA-IO<46>
3.3V or 2.5V, IO RTSS1
RS232, O
LVDS_B34_24_P
48
FPGA-IO<47>
3.3V or 2.5V, IO TxS1
RS232, O
LVDS_B35_24_P
49
FPGA-IO<48>
3.3V or 2.5V, IO CTSS1
RS232, I
LVDS_B34_23_N
50
FPGA-IO<49>
3.3V or 2.5V, IO RxS0
RS232, I
LVDS_B34_22_N
51
FPGA-IO<50>
3.3V or 2.5V, IO
LVDS_B34_23_P
52
FPGA-IO<51>
3.3V or 2.5V, IO GND (when using SER 1 )
LVDS_B34_22_P
53
FPGA-IO<52>
3.3V or 2.5V, IO
LVDS_B34_20_N
54
FPGA-IO<53>
3.3V or 2.5V, IO RTSO
RS232, O
LVDS_B34_12_N
CLK Input
55
FPGA-IO<54>
3.3V or 2.5V, IO
LVDS_B34_20_P
56
FPGA-IO<55>
3.3V or 2.5V, IO CTS0
RS232, I
LVDS_B34_12_P
CLK Input
57
FPGA-IO<56>
3.3V or 2.5V, IO
LVDS_B34_8_N
58
FPGA-IO<57>
3.3V or 2.5V, IO
3.3V, O
LVDS_B34_9_N
59
FPGA-IO<58>
3.3V or 2.5V, IO
LVDS_B34_8_P
60
FPGA-IO<59>
3.3V or 2.5V, IO
3.3V, O, RS485+
LVDS_B34_9_P
61
FPGA-IO<60>
3.3V or 2.5V, IO
LVDS_B34_7_N
62
FPGA-IO<62>
3.3V or 2.5V, IO
3.3V, O, RS485-
LVDS_B34_7_P
63
IIC3-SDA
3.3V, IO
64
IIC3-SCL
3.3V, IO
Note:
1) Signals in the column "Alternative Signal Name" are assembly options, which can be
enabled via 0Ω resistors.
INFORMATION
For the usage of the LVDS signals, the coding switches have to be configured to 2.5V.
See chapter “Coding Switches” on page 15.
Page 30 of 41
Hardware Manual • Doc. No.: V.2030.21 / Rev. 1.2
XMC-CPU/T10