12
EPSON
S5U1C6S3N2E2 MANUAL
(EVALUATION BOARD FOR S1C60N09/6S3N2/62N33)
6 PRECAUTIONS
6 PRECAUTIONS
Take the following precautions when using the S5U1C6S3N2E2:
6.1 Precautions for Operation
• Turn the power of all equipment off before connecting or disconnecting cables.
• When ROMs are inserted into the ROM sockets L, H, lock the lever securely by positioning it horizon-
tally. After the ROMs have been removed from the sockets, lock the lever at the same position above.
If the lever is left upright, poor contact may result.
• When using the S5U1C6S3N2E2 by itself, confirm that the following ROMs have been installed
correctly, then operate the S5U1C6S3N2E2.
Program ROMs
2
L.HEX, H.HEX
Function option ROM
1
F.HEX
Segment option ROM
1
S.HEX
6.2 Differences from Actual IC
Be aware that the S5U1C6S3N2E2 differs in terms of functionality and characteristics from the actual IC.
If these differences are ignored, there is a possibility that the application will not operate properly on an
actual IC even though it might have performed well on the ICE.
Note: The functions indicated with an "
∗
" in the following explanation can be used when the
S5U1C6S3N2E2 is set for the S1C6S3N2 or the S1C62N33.
■
Core CPU
The S5U1C6S3N2E2 supports the three models, S1C6S3N2, S1C62N33 and S1C60N09. Since each
model has a different core CPU built-in, there is a difference as shown in the following table.
When developing the software for the S1C62N33,
• be sure to initialize the D flag by the initial routine in the application program,
• do not read interrupt factor flags and do not write data to the interrupt mask register in the EI status.
Table 6.2.1 Difference on core CPU function
Model
S5U1C6S3N2E2
S1C6S3N2
S1C62N33
S1C60N09
Core CPU
S1C6200A
S1C6200A
S1C6200
S1C6200B
Initial value of D flag
0
0
Undefined
0
Reading interrupt factor flags,
writing to the interrupt mask
Valid
Valid
Invalid
Valid
register in the EI status
∗
There is no difference in the functions of the S1C6200A and S1C6200B.
■
I/O
<Interface voltage>
The interface voltage between the S5U1C6S3N2E2 and the target system is fixed at +5 V. Therefore, if
the target system requires the same interface voltage as that of the actual IC, add a level shifter circuit
or some other appropriate circuit to the target system.
<Output port drive capability>
The drive capability of each output port on the S5U1C6S3N2E2 is higher than that of the actual IC.
Check the drive capability of each output terminal on the model by referring to its Technical Manual
before designing the system and software.
