Installation and Configuration
S5U13A04B00C Rev 1.0 Evaluation Board
Seiko Epson Corporation
9
Rev. 3.1
3.2 Configuration Jumpers
The S5U13A04B00C has five jumper blocks which configure various setting on the board.
The jumper positions for each function are shown below.
JP1 - CLKI Source
JP1 selects the source for the CLKI input pin.
Position 1-2 sets the CLKI source to VCLKOUT from the Cypress clock synthesizer
(default setting).
Position 2-3 sets the CLKI source to the external oscillator at U7.
When no jumper is installed, the CLKI source is set to the BUSCLK signal from Header
H4.
Figure 3-2: Configuration Jumper (JP1) Location
Table 3-2: Jumper Summary
Jumper
Function
Position 1-2
Position 2-3
No Jumper
JP1
CLKI Source
VCLKOUT from clock
synthesizer
External oscillator (U7)
BUSCLK from Header H4
JP2
CLKI2 Source
MCLKOUT from clock
synthesizer
External oscillator (U8)
—
JP3
LCD Panel Voltage
+5V LCDVCC
+3.3V LCDVCC
—
JP4
GP0I0 Polarity on H1
Normal (Active High)
Inverted (Active Low)
GPIO0 not sent to H1
JP5
GPIO0 function select
GPIO0
HR-TFT PS signal
—
= recommended settings
JP1
VCLKOUT from
clock synthesizer
External
oscillator (U7)
BUSCLK from
Header H4
