Schematics
S5U13705B00C Rev 2.0 PCI Evaluation Board
Seiko Epson Corporation
25
Rev. 3.1
Figure 9-3: S1D13705B00C Schematics (3 of 5)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
<D
o
c>
2.
0
S5
U
1
37
05
B
0
0
C
-P
C
I bu
s:
LC
D
P
o
w
e
r Su
p
p
lies
B
35
T
u
e
sd
a
y, O
cto
b
e
r 0
2
, 2
0
0
1
Ti
tle
S
ize
Do
cu
me
n
t Nu
mb
e
r
Re
v
Da
te
:
She
e
t
o
f
n
L
CDP
WR
nL
C
D
P
W
R
2
CNF4
1
L
CDP
W
R
1,
2
PS
VC
C
IO
V
D
D
VL
C
D
+5
V
PSV
C
C
PSV
C
C
PS
IO
VD
D
VD
D
H
PS
IO
VD
D
PS
VC
C
+5
V
+5
V
+5
V
+5
V
U9
C
74
H
C
T
8
6/
SO
9
10
8
14
7
C1
6
0.
1
u
F
+
C2
1
4
.7u
F
/50
V
R1
8
10
K
R1
9
10
0K
R2
0
10
0K
Q2
M
M
BT
39
04
1
2
3
R1
4
47
5K
R1
5
20
0K
Pot
.
1
3
2
R1
6
14
K
+
C1
9
4.
7uF
/5
0
V
+
C2
0
4
.7u
F
/50
V
+
C2
2
47
uF
/1
6V
+
C2
3
5
6
u
F
/3
5V
Lo
w
ESR
+
C1
8
4
7uF
/1
6V
R1
7
10
K
U9
B
74
H
C
T
8
6
/SO
4
5
6
14
7
R2
1
10
0K Pot
.
1
3
2
U1
0
RD-
0
4
1
2
1
2
3
4
5
6
7
8
9
10
11
12
VO
UT_
ADJ
DC_IN
REM
OT
E
GND
GND
GND
GND
GND
NC
GND
GND
DC
_OU
T
U1
1
EP
N
0
01
1
2
3
4
5
6
7
8
9
11
10
DC
_OU
T
DC_O
UT
NC
GND
GND
VO
UT_A
DJ
NC
NC
NC
DC_I
N
DC_I
N
L1
1u
H
2
5
Q1
MM
B
T
3
9
0
6
1
2
3
L3
1
2
L4
1
2
U9
D
74
H
C
T
8
6/
SO
12
13
11
14
7
L2
1
2
U9
A
74
H
C
T
8
6/
SO
1
2
3
14
7
