S2R72A21 Application Note
Seiko Epson Corporation
9
(Rev.1.00)
3.3.2.6
HS operation (1)
After the Chirp K-J delivery to the INT port from the Host SoC is finished, the S2R72A21 would judge that the
Chirp is finished by SE0 detection and it would transit to HS state.
During this period, the USB signal path would be switched from Bus Switch to HS Synchronizer. Please wait
over 5us until the first SOF transmit start from the Chirp delivery from the Host SoC is finished.
Within this condition, the HS signal from the Host SoC received from the INT port as well as the HS signal from
the Portable Device received from the EXT port would be sent out to the other ports after it has been
re-synchronized by HS Synchronizer. During this period, there would be packet delay since the HS Synchronizer
compensates the SYNC field to 32bit. So please make the Host SoC communicate with the scheduling
considering this point. And please be careful that the timeout (explained in section 7.1.19.2 of USB specification)
is not provoked, especially in case multi-tier hubs are connected.
Furthermore, during HS operation, either the INT port or the EXT port is detected as the SOF receiving port. The
HS disconnection detector circuit is validated for the port which does not receive the SOF. In this basic operation,
SOF is received at INT port from Host SoC, so HS disconnection detector circuit of the EXT port (Portable
Device side) is validated.
3.3.2.7
Suspend operation
During HS operation, if HS signal has not been received over 3ms with both INT and EXT port side, the
S2R72A21 would judge HS operation cease and the transition to FS_LS state would occur to prepare for any
Suspend detection.
During this time, the USB signal path would switch from HS Synchronizer to Bus Switch and the INT and EXT
port would be connected. Please do not make the Host SoC and Portable Device transmit any HS signal after
2.95ms from the last HS signal delivery.
After the USB signal path switches to Bus Switch, it would detect the EXT port condition. In case it detects SE0,
it would judge that the Host SoC is indicating Bus Reset. In case it detects FS_J, it would judge that the Host SoC
is indicating Suspend. The first case is to prepare for Chirp Operation. In the latter case, it maintains the USB
signal path along with the state of Suspend active while the FS_J is continuously detected.
3.3.2.8
Resume operation
During Suspend operation active, the detection of the EXT condition would be continued. In case the S2R72A21
detects SE0, it would judge the Host SoC is indicating Bus Reset. In case it detects FS_K, it would judge the
Host SoC is indicating Resume and the Suspend operation would be finished. The first case prepares for the
Chirp operation. In the latter case, the USB signal path would be maintained along with the Resume operation
active while the FS_K is continuously detected.
3.3.2.9
HS operation (2)
When SE0 is detected after the FS_K at EXT port, the S2R72A21 would judge that the Host released the Resume
and it would transit to HS state.
During this period, the USB signal path would switch from Bus Switch to HS Synchronizer. Please keep the Host
SoC waiting over 5us from Resume end to the first SOF transmission start.
After the Resume is released, the HS operation is maintaining condition before the Suspend. So the HS
disconnection detector circuit of the EXT port (Portable Device side) is validated again.