Epson LQ-2180, Service Manual, Page: 25 / 56

LQ-2180 Revision A
Operating Principles Control Circuit 25
2.1 Control Circuit
The control circuit of the LQ-2180 is composed of the C272MAIN board
and the C165PNL board. This section describes the operations of the
major components in the circuit.
2.1.1 Overview of the Control Circuit Operation
The printer's control circuit includes a CPU (TMP96C141AF/IC4) that
runs at 19.66 MHz, a gate array (E05B42/IC3), a 1M bit PS-RAM (IC8),
a 8M bit CG-ROM (IC6), and so on. The figure below shows the block
diagram for the control circuit.
Figure 2-1. Control Circuit Block Diagram
The following figure shows the data flow from the host computer to the
printhead. Data sent from the host computer is converted to image data
and transmitted to the printhead through the gate array.
Figure 2-2. Data Flow
I C 7 ( n o t m o u n t e d )
I C 6 ( 8 M C G ) * 1
I C 8 ( 1 M P S - R A M )
C 1 6 5 P N L b o a r d
C N 1 ( P a r a l l e l I / F )
C N 2 ( T y p e B I / F )
C N 1 4 ( S e r i a l I / F )
C N 1 7 ( F a n )
C N 6 ( P E - F r o n t )
I C 4 ( T M P 9 6 C )
C N 5 ( P E - R e a r )
C N 7 ( T o p )
C N 4 ( C R H P )
C N 1 6 ( R e l e a s e 2 )
C N 1 2 ( R e l e a s e 1 )
C N 1 3 ( P G 1 )
I C 2 ( P S T 5 9 2 )
I C 1 1 ( S L A 7 0 2 4 M )
C N 1 1 ( C R )
I C 1 2 ( A 2 9 1 7 ) C N 1 0 ( P F )
C N 3 ( f r o m P S )
I C 3 ( E 0 5 B 4 2 )
C N 8
T r . ( Q 4 - 2 5 )
C N 9
I C 5 ( A T 9 3 C 4 5 )
A
ddr
es
s
I C 1 0 ( 8 M P - R O M )
* 1 : O n l y f o r K o r e a a n d T h a i v e r s i o n s
Da
ta
P r i n t d a t a
c o n v e r s i o n 2
C P U
T M P 9 6 C 1 4 1
R A M
G a t e A r r a y
E 0 5 B 4 2
P r i n t h e a d d r i v e
c i r c u i t
I n p u t
B u f f e r
I m a g e
B u f f e r
L i n e E d i t
B u f f e r
P r i n t d a t a
c o n v e r s i o n 1
D a t a l a t c h
a n d
d a t a o u t p u t
I m a g e d a t a
t r a n s f e r
O p t i o n I / F
P a r a l l e l I / F
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