Epson ActionPC 5500, User Manual

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Cache
At least 8KB of internal cache in the
processor; supports 128 or 256KB of
external cache with 32K x 8, 20ns or faster
SRAM DIP chips and a 32K x 8 15ns tag
chip
Math Math coprocessor built into the processor
coprocessor on all DX and Intel Pentium OverDrive
processors
Clock/
Real-time clock, calendar, and CMOS
calendar
RAM socketed on system board with
integrated Lithium battery
Controllers
PCI Chipset
Provides PCI caching, memory and
control for the PCI bus, and the
two-channel PCI IDE interface; integrated
PCI bridge translates CPU bus cycles to
PCI bus cycles and CPU-to-PCI memory
write cycles to PCI burst cycles
Video
Diskette
Trident 9440AGI high-performance PCI
local bus GUI accelerator controller
supports resolutions up to 1024 x 768
in 256 colors with lMB of DRAM;
1280 x 1024 with 2MB of DRAM
Controller on system board supports up to
two diskette drives or one diskette/
combo diskette and one tape drive
Specifications A - 3