Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB
LSB
MSB
LSB
C –
Z –
D –
I –
C –
Z –
D –
I –
S1C6200/6200A CORE CPU MANUAL
EPSON
45
3 INSTRUCTION SET
JP NZ,s
Jump if not zero
JP NZ,s
PCB
←
NBP, PCP
←
NPP, PCS
←
s
7
to s
0
if Z = 0
0
1
1
1 s
7
s
6
s
5
s
4
s
3
s
2
s
1
s
0
700H to 7FFH
I
5
Not affected
Not affected
Not affected
Not affected
Jumps to the destination address specified by the 8-bit operand when the zero flag
is not set.
JP NZ,10H
PCB
1
1
NBP
1
1
PCP
0000
0000
NPP
0000
0000
PCS
0000 0111
0001 0000
Z flag
0
0
JP s
Jump
JP s
PCB
←
NBP, PCP
←
NPP, PCS
←
s
7
to s
0
0
0
0
0 s
7
s
6
s
5
s
4
s
3
s
2
s
1
s
0
000H to 0FFH
I
5
Not affected
Not affected
Not affected
Not affected
Unconditional jump to the destination address specified by the 8-bit operand.
PSET 0AH
JP 10H
PCB
0
0
0
NBP
0
0
0
PCP
0000
0000
1010
NPP
0001
1010
1010
PCS
0100 0010
0100 0011
0001 0000
Summary of Contents for 6200A
Page 1: ...MF297 07a Core CPU Manual CMOS 4 BIT SINGLE CHIP MICROCOMPUTER S1C6200 6200A ...
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