Contents
page
Chapter 1 - Introduction ................................................... 1-1
System Block Diagram ...................................................... 1-2
Chapter 2 - Hardware Design .......................................... 2-1
2-1 Overview ................................................................... 2-1
EP-5BTXA-E Layout .................................................. 2-2
2-2 Connectors and Jumpers ............................................ 2-4
2-3 System Memory Configuration ................................... 2-6
2-4 Cache Memory Configuration .................................... 2-7
2-5 Real Time Clock Battey Replacement .......................... 2-8
2-6 Integrated PCI Bridge ................................................. 2-9
Chapter 3 - Award BIOS Setup ........................................ 3-1
3-1 Standard CMOS Setup ............................................... 3-2
3-2 BIOS Features Setup .................................................. 3-2
3-3 Chipset Features Setup ............................................... 3-6
3-4 Power Management Setup .......................................... 3-8
3-5 Plug & Play/PCI Configuration .................................... 3-11
3-6 Integrated Peripherals ................................................. 3-14
3-7 Load Setup Defaults ................................................... 3-16
3-8 Change Supervisor or User Password ......................... 3-17
3-9 IDE HDD Auto Detection ........................................... 3-18
3-10 HDD Low Level Format .............................................. 2-20
3-11 Save & Exit Setup ....................................................... 3-20
3-12 Exit Without Saving .................................................... 3-20
Chapter 4
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Technical Information .................................... 4-1
4-1 I/O & Memory Map .................................................... 4-1
4-2 Time & DMA Channels Map ...................................... 4-2
4-3 Interrupt Map ............................................................. 4-2
4-4 RTC & CMOS RAM Map ........................................... 4-3
Appendix A: POST Codes ................................................................... 4-4
Appendix B: I/O Connectors ............................................................... 4-8