Enclustra ME-KX2-160-1C-D10, User Manual

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2.16.2 Signal Description
Signal Name FPGA Pin Type FPGA Pin QSPI Pin Type Module
Flash Connector
Pin Pin
FLASH_CLK_FPGA_CCLK
CCLK_0 C8
SCK A-118
IO_0_14 K21
FLASH_CS# IO_L6P_T0_FCS_B_14 C23 CS# A-116
FLASH_DI IO_L1P_T0_D00_MOSI_14 B24 SI/IO0 A-114
FLASH_DO_FPGA_DIN IO_L1N_T0_D01_DIN_14 A25 SO/IO1 A-122
FLASH_WP# IO_L2P_T0_D02_14 B22 WP#/IO2 -
FLASH_HOLD# IO_L2N_T0_D03_14 A22 HOLD#/IO4 -
Table 23: QSPI Flash Interface
The QSPI flash is connected to the FPGA pins. Some of the signals are available on the module connector,
allowing the user to program the QSPI flash from an external master.
Please refer to Section 3 for details on programming the flash memory.
Warning!
Special care must be taken when connecting the QSPI flash signals on the base board. Long traces or
high capacitance may disturb the data communication between the FPGA and the flash device.
2.17 Dual Gigabit Ethernet
Two 10/100/1000 Mbit Ethernet PHYs are available on the KX2 FPGA module, connected to the
FPGA via RGMII interfaces.
2.17.1 Ethernet PHY Type
Table 24 describes the equipped Ethernet PHY device type on the KX2 FPGA module.
PHY Type Manufacturer Type
KSZ9031RNX Microchip (Micrel) 10/100/1000 Mbit
Table 24: Gigabit Ethernet PHY Type
D-0000-430-002 28 / 48 Version 06, 25.07.2019