62
DRAM
F
REQUENCY
/T
IMING
C
ONFIGURATION
Burst Length
Settings: [4, 8, Auto]
Channel Mode Select
Settings: [Channel A Only, Channel A and Channel B, Channel A
and Channel C]
Data 32Bit Support
Settings: [Disabled, Enabled]
ODT Enable
Settings: [Disabled, Enabled]
DRAM Frequency
Settings: [400 MHz, 533 MHz, 666 MHz, 800 MHz, Auto]
DRAM CAS# Latency [DDR/DDR2]
Settings: [1.5/2, 2.0/3, 2.5/4, 3.0/5, Auto]
DRAM Self Refresh
Settings: [Disabled, Enabled]
Summary of Contents for EPIA-P720
Page 1: ...user manual EPIA P720 Pico ITX Mainboard Revision 1 00 100 09162009 1423 ...
Page 10: ...1 1 Product Overview ...
Page 17: ...8 ...
Page 35: ...26 ...
Page 36: ...27 3 Onboard Jumpers ...
Page 39: ...30 ...
Page 40: ...31 4 P720 A I O Module Installation ...
Page 43: ...34 ...
Page 44: ...35 5 BIOS Setup This chapter gives a detailed explanation of the BIOS setup functions ...
Page 49: ...40 CPU CONFIGURATION CMPXCHG8B instruction support Settings Enabled Disabled ...
Page 56: ...47 CHIPSET ACPI CONFIGURATION USB Device Wakeup Function Settings Disabled Enabled ...
Page 66: ...57 Interrupt 19 Capture Settings Disabled Enabled ...
Page 72: ...63 Rank Interleave Settings Disabled Enabled Bank Address Scramble Settings Disabled Enabled ...
Page 73: ...64 AGP P2P BRIDGE CONFIGURATION Primary Graphics Adapter Settings PCI AGP ...
Page 77: ...68 PCI Delay Transaction Settings Disabled Enabled WATCH DOG Settings Disabled Enabled ...
Page 79: ...70 ...