8-18
8085A INSTRUCTION SET SUMMARY (Cont’d)
Instruction Code (1)
Mnemonic
Description
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
STACK OPS
PUSH B
Push register Pair B & C on stack
1
1
0
0
0
1
0
1
PUSH D
Push register Pair D & E on stack
1
1
0
1
0
1
0
1
PUSH H
Push register Pair H & L on stack
1
1
1
0
0
1
0
1
PUSH PSW
Push A and Flags on stack
1
1
1
1
0
1
0
1
POP B
POP register Pair B & C off stack
1
1
0
0
0
0
0
1
POP D
POP register Pair D & E off stack
1
1
0
1
0
0
0
0
POP H
POP register Pair H & L off stack
1
1
1
0
0
0
0
1
POP PSW
POP A and Flags off stack
1
1
1
1
0
0
0
1
XTHL
Exchange top of stack, H & L
1
1
1
0
0
0
1
1
SPHL
H & L to stack pointer
1
1
1
1
1
0
0
1
LXI SP
Load immediate stack pointer
0
0
1
1
0
0
0
1
INX SP
Increment stack pointer
0
0
1
1
0
0
1
1
DCX SP
Decrement stack pointer
0
0
1
1
1
0
1
1
JUMP
JMP
Jump unconditional
1
1
0
0
0
0
1
1
JC
Jump on carry
1
1
0
1
1
0
1
0
JNC
Jump on no carry
1
1
0
1
0
0
1
0
JZ
Jump on zero
1
1
0
0
1
0
1
0
JNZ
Jump on no zero
1
1
0
0
0
0
1
0
JP
Jump on positive
1
1
1
1
0
0
1
0
JM
Jump on minus
1
1
1
1
1
0
1
0
JPE
Jump on parity even
1
1
1
0
1
0
1
0
JPO
Jump on parity odd
1
1
1
0
0
0
1
0
PCHL
H & L to program counter
1
1
1
0
1
0
0
1
CALL
CALL
Call unconditional
1
1
0
0
1
1
0
1
CC
Call on carry
1
1
0
1
1
1
0
0
CNC
Call on no carry
1
1
0
1
0
1
0
0
CZ
Call on zero
1
1
0
0
1
1
0
0
CNZ
Call on no zero
1
1
0
0
0
1
0
0
CP
Call on positive
1
1
1
1
0
1
0
0
CM
Call on minus
1
1
1
1
1
1
0
0
CPE
Call on parity even
1
1
1
0
1
1
0
0
CPO
Call on parity odd
1
1
1
0
0
1
0
0
RETURN
RET
Return
1
1
0
0
1
0
0
1
RC
Return on carry
1
1
0
1
1
0
0
0
RNC
Return on no carry
1
1
0
1
0
0
0
0
RZ
Return on zero
1
1
0
0
1
0
0
0
RNZ
Return on no zero
1
1
0
0
0
0
0
0
RP
Return on positive
1
1
1
1
0
0
0
0
RM
Return on minus
1
1
1
1
1
0
0
0
RPE
Return on parity even
1
1
1
0
1
0
0
0
RPO
Return on parity odd
1
1
1
0
0
0
0
0
RESTART
RST
Restart
1
1
A
A
A
1
1
1
INPUT/OUTPUT
IN
Input
1
1
0
1
1
0
1
1
OUT
Output
1
1
0
1
0
0
1
1
INCREMENT AND DECREMENT
INR r
Increment register
0
0
D
D
D
1
0
0
DCR r
Decrement register
0
0
D
D
D
1
0
1
INR M
Increment memory
0
0
1
1
0
1
0
0
DCR M
Decrement memory
0
0
1
1
0
1
0
1
INX B
Increment B & C registers
0
0
0
0
0
0
1
1
INX D
Increment D & E registers
0
0
0
1
0
0
1
1
INX H
Increment H & L registers
0
0
1
0
0
0
1
1
Summary of Contents for MM-8000
Page 4: ...III...
Page 5: ...IV...
Page 6: ...V...
Page 8: ...VII...
Page 9: ...1 1...
Page 10: ...1 2...
Page 11: ...2 1...
Page 12: ...2 2 may be marked C1 on the PC board...
Page 14: ...2 4...
Page 15: ...2 5...
Page 16: ...2 6...
Page 17: ...3 1...
Page 19: ...3 3...
Page 20: ...3 4...
Page 22: ...4 1...
Page 23: ...4 2...
Page 24: ...4 3...
Page 25: ...4 4...
Page 26: ...4 5...
Page 27: ...5 1...
Page 28: ...5 2...
Page 29: ...5 3...
Page 30: ...5 4...
Page 31: ...5 5...
Page 32: ...6 1...
Page 33: ...6 2...
Page 34: ...6 3...
Page 35: ...6 4...
Page 36: ...7 1...
Page 37: ...7 2...
Page 38: ...7 3...
Page 39: ...7 4...
Page 40: ...7 5...
Page 41: ...7 6...
Page 43: ...7 8...
Page 44: ...7 9...
Page 45: ...7 10...
Page 46: ...7 11...
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Page 56: ...8 1...
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Page 81: ...10 4...
Page 82: ...11 1...
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Page 84: ...11 3...
Page 85: ...12 1...
Page 86: ...12 2...
Page 87: ...12 3...
Page 88: ...12 4...
Page 89: ...12 5...
Page 90: ...12 6...
Page 91: ...13 1...
Page 92: ...13 2...
Page 93: ...13 3...
Page 94: ...13 4...
Page 95: ...14 1...
Page 96: ...14 2...
Page 97: ...A 1...
Page 98: ...A 2...
Page 99: ...A 3...
Page 100: ...A 4...
Page 101: ...A 5...
Page 102: ...A 6...
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Page 112: ...A 16...
Page 113: ...A 17 APPENDIX 3 Monitor Program Flow Chart...
Page 114: ...A 18 APPENDIX 4...
Page 115: ...A 19...