User Guide • SC5-FESTIVAL • CompactPCI
®
Serial CPU Board
About this Manual
This manual describes the technical aspects of the SC5-FESTIVAL, required for installation and system
integration. It is intended for the experienced user only.
Edition History
Ed.
Contents/
Changes
Author
Date
1
User Manual SC5-FESTIVAL, english, preliminary edition (formal structure and
some content), Text #8548, File: sc5_ug.wpd
gn
2017-06-07
2
Updated Processor Info and local PCI Device Table; updated section “Hardware
Monitor NCT7491"
gn
2017-08-01
2.1
Added photos S40-NVME & S80-P6
jj
3 August 2017
2.2
Added photos S80-P6 with M.2 NVMe loaded
jj
21 August 2017
2.3
Added illustrations 1+4 slots backplane resources
jj
23 August 2017
2.4
Added photos S20-NVME
jj
6 October 2017
2.5
Added MTBF
jj
9 October 2017
3.0
Added SCZ-NVM side card photos, added AMT to table 'Feature Summary'
jj
3 November 2017
3.1
Added photos S82-P6
jj
25 July 2018
4
Added Power requirements
gn
2018-08-03
5
Backplane resources - PCIe root port numbers added
jj
9 August 2018
5.1
Mixup fixed regarding memory speed, added links to SCL & S82 mezzanines
jj
25 September 2018
6
Photos showing SC5-FESTIVAL w. S40-NVME mezzanine updated to S40 PCB
rev.1
jj
8 October 2018
6.1
Added photos showing SC5-FESTIVAL w. SCL-RHYTHM side card
jj
23 October 2018
7
Corrected title of CompactPCI Serial Backplane Connectors tables
gn
2019-04-03
8
Added Power requirements SC5-440D
gn
2019-08-30
8.1
Added sample custom backplane illustration for optimized PCIe usage
jj
14 October 2019
9
Added CPCI Hot-Plug UEFI Settings, added Coin Cell Error handling
gn
2020-01-13
10
Added tolerable high voltage level on TTL inputs of expansion connectors
gn
2020-01-24
11
Added P01-M12 (8HP mezzanine, photo)
jj
27 January 2020
12
Added mechanical details (mezzanine connector & mounting hole positions)
jj
29 April 2020
13
PCIe Link width configurable via BIOS setup (HSE2 mezzanine connector)
jj
17 July 2020
14
Corrected wrong pinout of backplane I
2
C in section “Local SMB/I
2
C Devices”
gn
2020-09-22
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