Egnite Ethernut 5.0, Hardware Manual, Page: 19 / 40

Board Overview
Ethernut 20 pin JTAG Connector
3.3V 1 2 3.3V
nTRST 3 4 GND
TDI 5 6 GND
TMS 7 8 GND
TCK 9 10 GND
RTCK 11 12 GND
TDO 13 14 GND
nRST 15 16 GND
N/C 17 18 GND
N/C 19 20 GND
Please refer to the chapter "Using the JTAG Interface" for more details.
RTC
The NXP PCF8563 Realtime Clock/Calendar Chip (IC7) is accessed via a TWI
(I2C). The chip's power supply is backed by a 0.33F double layer cap (C1). A
dedicated 32.768kHz crystal (Y2) drives the reference clock.
Hardware Clocks
Three crystals and one oscillator provide the required clocks.
Part Frequency Used by
Crystal Y1 18.432 MHz CPU main clock
Crystal Y2 32.678 kHz CPU slow clock
Crystal Y3 32.678 kHz RTC
Oscillator IC11 50 MHz Ethernet PHY
The CPU is started using a 32 kHz slow clock. In normal mode, the CPU uses the
internal PLL A to generate the 180 MHz master clock and a 90 MHz clock for the
peripherals. Except the USB clock, which is generated by PLL B.
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