ORACLE SERIES 2E, 2EC, 4E, 4EC, 4H
Operations Manual
Eberle Design Inc.
Page 24
Pin Function
Pin Function
J
Channel 2 Loop Input
8
Channel 2 Redundant Loop Input
K
Channel 2 Loop Input
9
Channel 2 Redundant Loop Input
L
Chassis Ground
10
Detector Address Bit #1
M
Reserved
11
Reserved
N
Reserved
12
Reserved
P
Reserved
13
Reserved
R
Reserved
14
Reserved
S
Channel 1 Secondary
Output (+)(2EC)
15
Detector Address Bit #2
T
Channel 1 Secondary
Output (-)(2EC)
16
Channel 1 Secondary Status Output
(2EC)
U
Reserved
17
Reserved
V
Reserved
18
Reserved
W
Channel 2 Output (+)
19
Data Transmit Output (TX)
X
Channel 2 Output (-)
20
Channel 2 Status Output
Y
Channel 2 Secondary
Output (+)(2EC)
21
Data Receive Input (RX)
Z
Channel 2 Secondary
Output (-)(2EC)
22
Channel 2 Secondary Status Output
(2EC)
6.5.2 ORACLE 4E, 4EC, 4H PIN ASSIGNMENT
Pin Function
Pin Function
A
Logic Ground
1
Channel 1 Timer Control Input
B
Detector Unit DC Supply
2
Channel 2 Timer Control Input
C
External Reset
3
Detector Address Bit #3
(Channel 3 Timer Control Input)
D
Channel 1 Loop Input
4
Channel 1 Redundant Loop Input
E
Channel 1 Loop Input
5
Channel 1 Redundant Loop Input
F
Channel 1 Output (+)
6
Detector Address Bit #0
H
Channel 1 Output (-)
7
Channel 1 Status Output
J
Channel 2 Loop Input
8
Channel 2 Redundant Loop Input
K
Channel 2 Loop Input
9
Channel 2 Redundant Loop Input
L
Chassis Ground
10
Detector Address Bit #1
(Channel 4 Timer Control Input)
M
Reserved
11
Reserved
N
Reserved
12
Reserved
P
Channel 3 Loop Input
13
Channel 3 Redundant Loop Input
R
Channel 3 Loop Input
14
Channel 3 Redundant Loop Input
S
Channel 3 Output (+)
15
Detector Address Bit #2
T
Channel 3 Output (-)
16
Channel 3 Status Output
U
Channel 4 Loop Input
17
Channel 4 Redundant Loop Input
V
Channel 4 Loop Input
18
Channel 4 Redundant Loop Input
W
Channel 2 Output (+)
19
Data Transmit Output (TX)
X
Channel 2 Output (-)
20
Channel 2 Status Output
Y
Channel 4 Output (+)
21
Data Receive Input (RX)
Z
Channel 4 Output (-)
22
Channel 4 Status Output