ECS G31T-M, Manual

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33
Using BIOS
Advanced Chipset Setup
This page sets up more advanced information about your system. Handle this page
with caution. Any changes can affect the operation of your computer.
Configure DRAM Timing by SPD (Enabled)
When this item is set to enable, the DDR timing is configured using SPD. SPD (Serial
Presence Detect) is located on the memory modules, BIOS reads information coded
in SPD during system boot up.
CMOS Setup Utility - Copyright (C) 1985-2005, American Megatrends, Inc.
Advanced Chipset Setup
DRAM Frequency Auto
Configure DRAM Timing by SPD Enabled
VGA Share Memory Enabled, 8MB
DVMT Mode Select DVMT Mode
DVMT/FIXED Memory 256MB
High Performance Event Timer Enabled
Help Item
Options
Auto
667 MHz
800 MHz
F10: Save ESC: Exit +/-/: Value Enter : Select
F9: Optimized Defaults F1:General Help
: Move
mnlk
DRAM Frequency (Auto)
VGA Share Memory (Enabled, 8MB)
This item lets you allocate a portion of the main memory for the onboard VGA
display application.
This item enables users to adjust the DRAM frequency. The default setting is auto and
we recommend users leave the setting unchanged. Modify it at will may cause the
system to be unstable.
DVMT Mode Select (DVMT Mode)
This item allows you to select the DVMT operating mode.
DVMT/FIXED Memory (256MB)
When set to Fixed Mode, the graphics driver will reserve a fixed portion of the
system memory as graphics memory, according to system and graphics requirements.
Press <Esc> to return to the main menu setting page.
High Performance Event Timer (Enabled)
This item enables or disables HPET (High Performance Event Timer) support.