PXES4P Switches
Installation and User Guide (10/06)
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2.4 Frame Buffering and Latency
The PXES4P Series Switches are store-and-forward switches. Each frame (or
packet) is loaded into the Switch’s memory and inspected before forwarding can occur.
This technique ensures that all forwarded frames are of a valid length and have the correct
CRC, i.e., are good packets. This eliminates the propagation of bad packets, enabling all of
the available bandwidth to be used for valid information.
While other switching technologies such as "cut-through" or "express" impose
minimal frame latency, they will also permit bad frames to propagate out to the Ethernet
segments connected. This "cut-through" technique permits collision fragment frames,
which are a result of late collisions, to be forwarded which add to the network traffic.
Since there is no way to filter frames with a bad CRC (the frame must be present in order
for CRC to be calculated), the result of indiscriminate cut-through forwarding is greater
traffic congestion, especially at peak activity. Since collisions and bad packets are more
