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TSEV8388B - Evaluation Board User Guide

6-1

0973D–BDC–02/09

e2v semiconductors SAS 2009

Section 6

Schematics

6.1

TSEV8388B
Electrical
Schematics

Please refer to figure 6.1 below.

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Summary of Contents for TSEV8388B

Page 1: ...ADC 8 bit 1 Gsps TSEV8388B Evaluation Board User Guide...

Page 2: ......

Page 3: ...unctions Settings 2 1 2 4 Power Supplies 2 2 2 5 TS8388B On board Implementation 2 2 Section 3 Operating Procedures and Characteristics 3 1 3 1 Introduction 3 1 3 2 Operating Procedure 3 1 3 3 Electri...

Page 4: ...ly with External Heatsink 5 5 5 4 Nominal CQFP68 Thermal Characteristics 5 6 5 4 1 Thermal Resistance from Junction to Ambient Rthja 5 6 5 4 2 Thermal Resistance from Junction to Case Rthjc 5 6 5 4 3...

Page 5: ...TS8388B Evaluation Board EB is very straightforward as it only implements the TS8388B ADC device SMA connectors for input output accesses and a 2 54 mm pitch connector compatible with high frequency...

Page 6: ...Select Z0 50 Z0 50 VIN VINB ADC Gain Adjust GAIN GND VCC GORB GORB DR DRB D0 D0B Z0 50 MC100EL16 Differential Receivers optional Digital Output Data Z0 50 Z0 50 Z0 50 D7 D7B OR ORB VCC VCC 5V GND VPL...

Page 7: ...s with specific characteristics A low insertion loss RO4003 Hydrocarbon wovenglass dielectric layer of 200 m thickness chosen for its low loss 0 318 dB inch and enhanced dielectric consistency in the...

Page 8: ...ary temperature range 1 4 Analog Input Clock Input and De embedding Fixture Accesses The differential active inputs Analog Clock De embedding fixture are provided by SMA connectors Reference VITELEC 1...

Page 9: ...opper metal layers The bottom metal layer is dedicated to the power supplies 2 2 AC Inputs Digital Outputs The board uses 50 impedance microstrip lines for the differential analog inputs clock inputs...

Page 10: ...onnections to the device pins for microstrip line back termination and bypassing Connecting the positive supply pads The positive supply pads denoted VCC The corresponding VCC pad numbers are 19 21 23...

Page 11: ...388B clock inputs with balanced signals Connect directly the RF sources to the in phase analog and clock inputs of the converter However dynamic performances can be somewhat improved by entering eithe...

Page 12: ...tively from 10 Msps up to 1 4 Gsps in binary output format and 10 Msps up to 2 Gsps in Gray output format It is capable of sampling analog input waveforms ranging from DC up to 1 5 GHz 3 3 Electrical...

Page 13: ...mA IEEA 170 185 mA IEED 140 160 mA Positive supply voltage not used by default If installed dedicated to MC100EL16 differential Receivers VEET 5 25 5 4 75 V VDD 2 15 2 185 V Positive supply current n...

Page 14: ...Operating Procedures and Characteristics 3 4 TSEV8388B Evaluation Board User Guide 0973D BDC 02 09 e2v semiconductors SAS 2009...

Page 15: ...Moreover the clock input common mode may be 0V or 1 3V if ECL input format is used for the clock inputs As for the analog input either clock input can be chosen leaving the other input open as both cl...

Page 16: ...ain from approximately 0 85 up to 1 15 The gain adjust transfer function is given below Figure 4 1 ADC Gain Adjust 4 6 SMA Connectors and Microstrip Lines De embedding Fixture Attenuation in microstri...

Page 17: ...to force current and measure the VBE voltage across the dedicated transistor connected between pads 32 and 33 The measurement method consists of forcing a 3 mA current flowing into a diode mounted tr...

Page 18: ...output remains at logical zero and is independent of the external free run ning encoding clock The Data ready output signal DR DRB is reset to logical zero after TRDR 720 ps typical TRDR is measured b...

Page 19: ...iguration Note The TS81102G0 DMUX device can be used at the ADC output in order to slow down the ADC output data rate by a factor of 4 or 8 RF Generator RF Generator 121 dBc Hz at 1 KHz offset from fc...

Page 20: ...Application Information 4 6 TSEV8388B Evaluation Board User Guide 0973D BDC 02 09 e2v semiconductors SAS 2009...

Page 21: ...ge 1 2 3 4 5 6 7 8 9 10 11 VPLUSD VPLUSD NC B3b DRb GND GND B4 B5 NC DVEE GND GND B2 VPLUSD B3 DR B4b B5b VPLUSD B6b B2b B6 B1 B7b B1b B7 B0 ORb B0b OR Gorb VCC VCC GAIN VCC VCC GND GND GND GND VCC GN...

Page 22: ...VINB 1 L4 Inverted phase of ECL clock input signal CLK CLK C1 In phase ECL clock input signal The analog input is sampled and held on the rising edge of the CLK signal CLKB D1 Inverted phase of ECL c...

Page 23: ...SD VPLUSD VPLUSD D3B D3 GND DRB DR DVEE DVEE DVEE D4B D4 GND D5B D5 GND GND CLK CLK CLKb GND GND CLKb GND GND GND VEE VEE VCC VCC VEE Diode 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 GND VCC D...

Page 24: ...32 33 46 47 61 5V positive supply VEE 30 31 44 45 48 5V analog negative supply DVEE 8 9 10 5V digital negative supply VIN 54 1 55 In phase analog input signal of the Sample and Hold differential pream...

Page 25: ...component heatsink or PCBoard As an example 2 0 C W can be taken for 50 m of thermal grease 5 3 3 CBGA68 Board Assembly with External Heatsink It is recommended to use an external heatsink or PCBoard...

Page 26: ...the following measurements a 50 x 50 x 16 mm heatsink has been used see Fig ure 5 6 on page 7 Note 1 Heatsink is glued to backside of package or screwed and pressed with thermal grease Figure 5 5 Ther...

Page 27: ...09 5 4 3 CBGA68 Board Assembly with External Heatsink Figure 5 6 CQFP68 Board Assembly with a 50 x 50 x 16 mm External Heatsink 24 13 28 96 15 0 1 3 3 2 50 0 1 4 4 0 2 5 16 0 Printed circuit Interfac...

Page 28: ...c is given to 1 56 C W This value does not include thermal contact resistance between package and external component heatsink or PCBoard As an example 2 0 C W can be taken for 50 m of thermal grease 5...

Page 29: ...88BMFS CQFP 68 with heatspreader M grade 55 C Tc Tj 125 C Standard TS8388BMFS B Q CQFP 68 with heatspreader M grade 55 C Tc Tj 125 C Mil PRF 38535 QML level Q DSCC 5962 0050401QXC TS8388BMFS9NB1 CQFP...

Page 30: ...Package Description 5 10 TSEV8388B Evaluation Board User Guide 0973D BDC 02 09 e2v semiconductors SAS 2009...

Page 31: ...TSEV8388B Evaluation Board User Guide 6 1 0973D BDC 02 09 e2v semiconductors SAS 2009 Section 6 Schematics 6 1 TSEV8388B Electrical Schematics Please refer to figure 6 1 below...

Page 32: ...Schematics 6 2 TSEV8388B Evaluation Board User Guide 0973D BDC 02 09 e2v semiconductors SAS 2009 Figure 6 1 TSEV8388B Electrical Schematic...

Page 33: ...tputs Option Using MC100EL16 Differential Receivers VDD 2V IN INb OUT OUTb To output connector Z0 50 Z0 50 50 50 Digital data 50 differential termination GND D0 D7 OR DR D0B D7B ORB DRB R4 50 R3 50 OU...

Page 34: ...atics 6 4 TSEV8388B Evaluation Board User Guide 0973D BDC 02 09 e2v semiconductors SAS 2009 6 2 Evaluation Board Schematics 6 2 1 CBGA68 Option Figure 6 4 Component Side Description Figure 6 5 Ground...

Page 35: ...Schematics TSEV8388B Evaluation Board User Guide 6 5 0973D BDC 02 09 Figure 6 6 Power Supplies Planes Figure 6 7 TSEV8388B Evaluation Board Component Placement...

Page 36: ...Schematics 6 6 TSEV8388B Evaluation Board User Guide 0973D BDC 02 09 e2v semiconductors SAS 2009 6 2 2 CQFP68 Option Figure 6 8 Component Side Description Figure 6 9 Ground Plane...

Page 37: ...Schematics TSEV8388B Evaluation Board User Guide 6 7 0973D BDC 02 09 Figure 6 10 Power Supplies Planes Figure 6 11 TSEV8388B Evaluation Board Component Placement...

Page 38: ...Schematics 6 8 TSEV8388B Evaluation Board User Guide 0973D BDC 02 09 e2v semiconductors SAS 2009...

Page 39: ...Waterhouse Lane Chelmsford Essex CM1 2QU England Tel 44 0 1245 493493 Fax 44 0 1245 492492 mailto enquiries e2v com e2v sas 16 Burospace F 91572 Bi vres Cedex France Tel 33 0 16019 5500 Fax 33 0 1601...

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