DSM 96M4371o User Manual Download Page 16

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Hardware Configuration

96M4371o

User’s Manual

2-5

J6: 8-bit GPIO

PIN No.

Signal Description

PIN No.

Signal Description

GPIO11

GPIO32

GPIO12

GPIO33

GPIO30

GPIO36

GPIO31

GPIO37

GND

VCC

J7: PS2 KB/MS Pin Header

PIN No.

Signal Description

PIN No.

Signal Description

Mouse Data

Keyboard Data

KEY

GND

PS2 Power

Mouse Clock

Keyboard Clock

J8: IR Pin Header

PIN No.

Signal Description

VCC

IRRX

GND

IRTX

J9: HDD LED Pin Header

Pin No.

Signal Description

VCC(pull up 330 ohm)

HD_LED#

J10: SUS LED Pin Header

Pin No.

Signal Description

5VSB(pull up 330 ohm)

SUS_LED#

Summary of Contents for 96M4371o

Page 1: ...96M4371o Single Board Computer User s Manual Version 1 1 Copyright DSM Computer GmbH 2011 All rights reserved All other brand names are registered trademarks of their respective owners ...

Page 2: ...gle Board Computer 3 2 3 3 1 Chipset Component Driver 3 2 3 3 2 Intel Integrated HD Graphics Controller 3 2 3 3 3 Intel Gigabit Ethernet Controller 3 3 3 3 4 Audio Controller 3 3 3 4 Clear CMOS Operation 3 3 3 5 WDT Function 3 3 3 6 GPIO 3 10 3 6 1 Pin assignment 3 10 3 6 2 96M4371o GPIO Programming Guide 3 10 3 6 3 Example 3 11 Chapter 4 BIOS Setup Information 4 1 4 1 Entering Setup Launch System...

Page 3: ...uide of Watch Dog Timer function Chapter 4 BIOS Setup Information Specifies the meaning of each setup parameters how to get advanced BIOS performance and update new BIOS In addition POST checkpoint list will give users some guidelines of trouble shooting Chapter 5 Troubleshooting Provides you a few useful tips to quickly get your 96M4371o running with no failure As basic hardware installation has ...

Page 4: ...Six SATA 300 ports dual ports via backplane support RAID 0 1 5 10 To meet bandwidth of storage and expansion cards requirement the 96M4371o was designed flexible with five PCI Express lanes via backplane Those PCI Express lanes could be one PCI Express x16 or two PCI Express x8 links from CPU and four PCI Express x1 links or one PCI Express x4 link from PCH Four PCI Express x1 links configuration ...

Page 5: ...n board SATA ports support RAID 0 1 5 10 The PICMG 1 3 SHB is the best solution of applications such like flight simulation image processing broadcasting and so on that need performance of display and storage 1 2 Check List The 96M4371o package should cover the following basic items z One 96M4371o single host board z One dual Serial ports cable kit z One single Parallel port cable kit z One FDD ca...

Page 6: ...low PICMG 1 3 Rev 1 0 standard PCI Express and PCI Support four PCI Express x1 can be aggregated as one PCI Express x4 through backplane Support one PCI Express x16 can be separated as two PCI Express x8 through backplane Support four PCI devices through backplane z SATA Four SATA 300 ports on board and dual SATA 300 ports via backplane Support Intel Matrix Storage Technology based on Intel QM57 z...

Page 7: ...imer Support WDT function through software programming for enable disable and interval setting Generate system reset z On board VGA GMCH integrated graphics 400MHz core frequency share system memory up to 1GB for system with greater than or equal to 192MB of system memory z On board Ethernet LAN Dual Intel PCI Express x1 interface based Gigabit Ethernet to support RJ 45 connector z High Driving GP...

Page 8: ...rd 1 Onboard Intel 82577LM Gigabit Network Connection LAN Driver Intel 82577LM Gigabit Network Connection Version 11 5 10 0 LAN Card 2 Onboard Intel 82583V Gigabit Network Connection LAN Driver Intel 82583V Gigabit Network Connection Version 11 4 7 0 Audio Card Onboard Realtek ALC662 Audio Audio Driver Realtek High Definition Audio Version 5 10 0 5043 Chip Driver Intel Chipset Device Software Vers...

Page 9: ...System Overview 96M4371o User s Manual 1 6 1 3 1 Mechanical Drawing ...

Page 10: ...System Overview 96M4371o User s Manual 1 7 ...

Page 11: ...System Overview 96M4371o User s Manual 1 8 1 4 System Architecture All of details operating relations are shown in 96M4371o series System Block Diagram 96M4371o System Block Diagram ...

Page 12: ...overing a jumper cap over jumper pins Open or N C Not Connected means removing a jumper cap from jumper pins Users can refer to Figure 2 1 for the Jumper locations Figure 2 1 96M4371o Jumper and Connector Locations The jumper settings are schematically depicted in this manual as follows JP1 COM2 RS232 422 485 Selection JP1 Function 5 6 9 11 10 12 15 17 16 18 Short RS 232 3 4 7 9 8 10 13 15 14 16 2...

Page 13: ...interface connectors Connector Function List Connector Function Remark JP6 LPC Debug Pin header J1 COM2 Pin Header J2 COM1 Pin Header J3 Parallel Port Pin Header J4 DDR3 CHB Slot J5 FDC Interface Pin Header J6 8 bit GPIO Pin Header J7 PS2 KB MS Pin Header J8 IR Pin Header J9 HDD LED Pin Header J10 SUS LED Pin Header J11 TPM Pin Header J12 Buzzer Pin Header J13 DDR3 CHA Slot J14 Audio MIC Line in L...

Page 14: ...PIN No Signal Description 1 LAD0 2 VCC3 3 LAD1 4 PLT_RST 5 LAD2 6 LFRAME 7 LAD3 8 CLOCK 9 KEY 10 GND J1 COM2 232 422 485 Pin Header PIN No Signal Description PIN No Signal Description RS 232 RS 422 RS 485 RS 232 RS 422 RS 485 1 DCD TX DATA 2 DSR TX DATA 3 RXD RX N C 4 RTS RX N C 5 TXD GND GND 6 CTS N C N C 7 DTR N C N C 8 RI N C N C 9 GND N C N C 10 NC N C N C J2 COM1 Port Pin Header PIN No Signal...

Page 15: ... 19 Acknowledge 20 Ground 21 Busy 22 Ground 23 Paper Empty 24 Ground 25 Printer Select 26 N C J5 FDC Interface Pin Header PIN No Signal Description PIN No Signal Description 1 Ground 2 Density Select 0 3 Ground 4 NC 5 KEY 6 NC 7 Ground 8 Index 9 Ground 10 Motor ENA 11 Ground 12 NC 13 Ground 14 Drive Select A 15 Ground 16 NC 17 Ground 18 Direction 19 Ground 20 Step 21 Ground 22 Write Data 23 Ground...

Page 16: ...S Pin Header PIN No Signal Description PIN No Signal Description 1 Mouse Data 2 Keyboard Data 3 KEY 4 KEY 5 GND 6 GND 7 PS2 Power 8 PS2 Power 9 Mouse Clock 10 Keyboard Clock J8 IR Pin Header PIN No Signal Description 1 VCC 2 NC 3 IRRX 4 GND 5 IRTX 6 NC J9 HDD LED Pin Header Pin No Signal Description 1 VCC pull up 330 ohm 2 HD_LED J10 SUS LED Pin Header Pin No Signal Description 1 5VSB pull up 330 ...

Page 17: ...12 Buzzer Pin Header PIN No Signal Description 1 VCC 2 NC 3 NC 4 BUZZER J14 Audio MIC Line in Line out Pin Header PIN No Signal Description PIN No Signal Description 1 MIC with Reference Voltage 2 Analog GND 3 Line in Left Channel 4 Analog GND 5 Line in Right Channel 6 Analog GND 7 Line out Left Channel 8 Analog GND 9 Line out Right Channel 10 KEY J15 Buzzer Pin Header PIN No Signal Description 1 ...

Page 18: ...D 9 KEY 10 GND J30 Second SPI Pin Header PIN No Signal Description PIN No Signal Description 1 SPI_CS 1 2 V3 3M 3 SPI_SO 4 SPI_CLK 5 GND 6 SPI_SI J31 SM_BUS Pin Header PIN No Signal Description 1 SMB_CLK 2 NC 3 GND 4 SMB_DATA 5 VCC J34 CPU Fan Pin Header Pin No Signal Description 1 GND 2 12V 3 PWM_CONTROL 4 SENSE J36 SYS FAN Pin Header Pin No Signal Description 1 PWM_CONTROL 2 12V 3 SENSE ...

Page 19: ...1o module it can be applied in many different uses depending on the function of carrier board 3 2 Main Memory 96M4371o provide 2 x 240pin Long DIMM sockets which supports 800 1066 DDR3 SDRAM as main memory Non ECC non register type of functions The maximum memory can be up to 8GB Memory clock and related settings can be detected by BIOS via SPD interface For system compatibility and stability do n...

Page 20: ... Driver 96M4371o uses state of art Intel QM57 chipset It s a new chipset that some old operating systems might not be able to recognize To overcome this compatibility issue for Windows Operating Systems such as Windows XP Vista Win7 please install its INF before any of other Drivers are installed You can find very easily this chipset component driver in 96M4371o CD title 3 3 2 Intel Integrated HD ...

Page 21: ...ation Ì 1 2 Short Clear CMOS Contents 3 5 WDT Function The working algorithm of the WDT function can be simply described as a counting process The Time Out Interval can be set through software programming The availability of the time out interval settings by software or hardware varies from boards to boards 96M4371o allows users control WDT through dynamic software programming The WDT starts count...

Page 22: ...en each register is accessed Additionally there are maximum 2 seconds of counting tolerance that should be considered into user application program For more information about WDT please refer to ITE8721 data sheet There are two PNP I O port addresses that can be used to configure WDT 1 0x2E Test 1 Register 2 0x2F Test 2 Register Below are some example codes which demonstrate the use of WDT model s...

Page 23: ...mov al 87h out dx al mov al 01h out dx al mov al 55h out dx al mov al 0AAh out dx al mov al 20h read the Chip ID to check the address of SIO out dx al inc dx in al dx default 87h mov bl al mov al 21h mov dx ADDRESS out dx al inc dx in al dx default 21h mov bh al cmp bx 2187h je L1 xor bx bx mov ah 0Eh mov al S int 10h mov al I int 10h mov al O int 10h mov al int 10h mov al F ...

Page 24: ... int 10h LF jmp stop L1 mov dx ADDRESS set WDT state mov al 07h out dx al inc dx out dx al mov dx ADDRESS mov al 71h out dx al inc dx mov al 00h out dx al mov dx ADDRESS mov al 72h out dx al inc dx mov al 0C0h out dx al xor bx bx show the potion mov ah 0Eh mov al W int 10h mov al D int 10h mov al T int 10h mov al int 10h mov al T int 10h ...

Page 25: ...h mov al s int 10h mov al t int 10h mov al a int 10h mov al r int 10h mov al t int 10h mov al 0dh CR int 10h mov al 0ah int 10h LF mov al 5 int 10h mov al int 10h mov al S int 10h mov al e int 10h mov al c int 10h mov al o int 10h mov al n int 10h mov al d int 10h mov al int 10h mov al w int 10h mov al i int 10h ...

Page 26: ... 10h mov al mov al r int 10h mov al e int 10h mov al s int 10h mov al e int 10h mov al t int 10h mov al 0dh CR int 10h mov al 0ah int 10h LF mov dx ADDRESS mov al 73h out dx al inc dx mov al 05h out dx al mov dx ADDRESS mov al 74h out dx al inc dx mov al 00h out dx al stop mov dx ADDRESS mov al 02h out dx al inc dx mov al 02h ...

Page 27: ...System Installation 96M4371o User s Manual 3 9 out dx al mov ah 4ch int 21h return dos end pgm ...

Page 28: ...IO pins on 96M4371o These GPIO pins are from SUPER I O IT8721 GPIO pins and can be programmed as Input or Output direction J16 pin header is for 8 GPIO pins and its pin assignment as following J6_Pin1 GPIO0 from SUPER I O_GPIO11 with Ext 4 7K PH J6_Pin2 GPIO1 from SUPER I O_GPIO32 with Ext 4 7K PH J6_Pin3 GPIO2 from SUPER I O_GPIO12 with Ext 4 7K PH J6_Pin4 GPIO3 from SUPER I O_GPIO33 with Ext 4 7...

Page 29: ...eeds to be written into Test 1 first Then the data will be read written from to Test 2 To R W IT8721 CR it is needed to Enter Enable Configuration Mode first When completing the programming it is suggested to Exit Disable Configuration Mode Enter Configuration Mode Write 87h to IO port Test 1 twice Exit Configuration Mode Set bit 1 of the configure control register index 02h to 1 to exit 3 6 3 Exa...

Page 30: ...ov bh al cmp bx 2187h cmp CHIP ID je L1 mov ADDRESS 4eh SIO in 4Eh mov dx ADDRESS enter MB PnP mode in 4Eh mov al 87h out dx al mov al 01h out dx al mov al 55h out dx al mov al 0AAh out dx al mov al 20h read the Chip ID to check the address of SIO out dx al inc dx in al dx default 87h mov bl al mov al 21h mov dx ADDRESS out dx al inc dx in al dx default 21h mov bh al cmp bx 2187h je L1 xor bx bx m...

Page 31: ...System Installation 96M4371o User s Manual 3 13 int 10h ...

Page 32: ... 10h mov al l int 10h mov al 0dh CR int 10h mov al 0ah int 10h LF jmp L6 L1 mov dx ADDRESS Switch to LDN 03h mov al 07h out dx al nop inc dx mov al 03h out dx al nop mov dx ADDRESS Set F0 bit3 1 mov al 0F0h out dx al nop inc dx in al dx or al 08h POST Data Port Disable out dx al nop mov dx ADDRESS Set 30 bit0 0 mov al 30h out dx al nop inc dx ...

Page 33: ...System Installation 96M4371o User s Manual 3 15 and al 00h Parallel Port Disable ...

Page 34: ...c Device 07 LDN 07h out dx al nop inc dx out dx al nop mov dx ADDRESS Set E9 bit5 1 mov al 0E9h out dx al nop inc dx in al dx or al 20h out dx al nop mov dx ADDRESS mov al 25h out dx al The GPIO11 GPIO12 be set GP function nop inc dx in al dx or al 06h out dx al nop mov dx ADDRESS mov al 27h out dx al The GPIO30 31 32 33 36 37 be set GP function nop inc dx in al dx or al 0CFh ...

Page 35: ...System Installation 96M4371o User s Manual 3 17 out dx al ...

Page 36: ...ov al 0C2h out dx al set GPIO30 31 32 33 36 37 Simple I O function nop inc dx in al dx or al 0CFh out dx al nop mov dx ADDRESS mov al 0C8h out dx al set GPIO11 GPIO12 output 1 nop inc dx in al dx or al 06h out dx al nop mov dx ADDRESS mov al 0CAh out dx al set GPIO30 31 output 1 nop inc dx in al dx or al 03h out dx al nop mov dx ADDRESS mov al 0CAh out dx al set GPIO32 33 36 37 input 0 ...

Page 37: ...System Installation 96M4371o User s Manual 3 19 nop ...

Page 38: ...al mov dx ADDRESS load the base address LSB mov al 63h out dx al nop inc dx in al dx mov bx ax mov dx ax go to gpio1 address in al dx or al 06h set high to input out dx al nop nop add bx 02h 0A42 mov dx bx nop in al dx or al 03h set high to input and al 33h out dx al in al dx read the gpio output and al 0CFh cmp al 0CFh jnz L5 sub bx 02h mov ax bx mov dx ax go to gpio1 address ...

Page 39: ...System Installation 96M4371o User s Manual 3 21 in al dx ...

Page 40: ...gpio output or al 30h cmp al 30h jnz L5 mov dx ADDRESS mov al 0C8h out dx al set GPIO11 GPIO12 input 0 inc dx in al dx and al 0F9h out dx al mov dx ADDRESS mov al 0CAh out dx al set GPIO30 31 input 0 inc dx in al dx and al 0FCh or al 0CCh set GPIO32 33 36 37 output 1 out dx al mov ax bx mov dx ax in al dx or al 0CCh set high to input out dx al in al dx read the gpio output or al 30h cmp al 0FFh jn...

Page 41: ...System Installation 96M4371o User s Manual 3 23 mov ax bx ...

Page 42: ... to gpio3 address in al dx and al 33h set high to input out dx al in al dx or al 30h cmp al 30h jnz L5 sub bx 02h mov ax bx mov dx ax in al dx or al 0FCh cmp al 0FCh jnz L5 jmp L4 L5 xor bx bx mov ah 0Eh out dx al mov al F int 10h mov al a int 10h mov al i int 10h mov al l int 10h mov al 0dh CR int 10h mov al 0ah int 10h LF jmp L6 ...

Page 43: ... mov al s int 10h mov al s int 10h mov al 0dh CR int 10h mov al 0ah int 10h LF L6 Save the register value mov dx Address mov al 07h out dx al mov al 03h inc dx out dx al mov al 030h mov dx address out dx al mov al 001h inc dx out dx al mov al 0f0h mov dx address out dx al mov al 000h inc dx out dx al mov dx ADDRESS ...

Page 44: ...System Installation 96M4371o User s Manual 3 26 mov al 02h out dx al ...

Page 45: ...System Installation 96M4371o User s Manual 3 27 inc dx mov al 02h out dx al xor ah ah int 16h Gasym mov ax 4c00h Gasym int 21h exitp mov ah 4ch int 21h return dos end pgm ...

Page 46: ...enter the SETUP program Some errors are significant enough to abort the start up 4 1 Entering Setup Launch System Setup Power on the computer and the system will start POST Power On Self Test process When the message below appears on the screen press Del key will enter BIOS setup screen Press Del to enter SETUP If the message disappears before responding and still wish to enter Setup please restar...

Page 47: ...s such as time date etc BIOS Information Memory Information These items show the firmware and memory specifications of your system Read only System Time The time format is Hour Minute Second Use or to configure system Time System Date The date format is Day Month Date Year Use or to configure system Date ...

Page 48: ...e this menu to set up the items of special enhanced features Launch PXE OpROM Enable or Disable Boot Option for Lagacy Network Devices Choices Disabled Enabled Launch Storage OpROM Enable or Disable Boot Option for Lagacy Mass Storage devices Choices Disabled Enabled ...

Page 49: ...Subsystem Settings PCI ROM Priority Choices Legacy ROM EFI Compatible ROM PCI Latency Timer Choices 32 PCI 64 PCI 96 PCI 128 PCI 160 PCI 192 PCI 224 PCI 248 PCI Bus Clocks VGA Palette Snoop Choices Disabled Enabled PERR Generation Choices Disabled Enabled ...

Page 50: ...ded Tag Choices Disabled Enabled No Snoop Choices Disabled Enabled Maximum Payload Choices Auto 128 Bytes 256 Bytes 512 Bytes 1024 Bytes 2048 Bytes 4096 Bytes Maximum Read Request Choices Auto 128 Bytes 256 Bytes 512 Bytes 1024 Bytes 2048 Bytes 4096 Bytes ASPM Support Choices Disabled Auto Force L0 Extended Synch Choices Disabled Enabled ...

Page 51: ...on 96M4371o User s Manual 4 6 ACPI Settings Enable ACPI Auto Configuration Choices Enabled Disabled Enable Hibernation Choices Enabled Disabled ACPI Sleep State Choices Suspend Disabled S1 CPU Stop Clock S3 Suspend to RAM ...

Page 52: ...BIOS Setup Information 96M4371o User s Manual 4 7 Trusted Computing TPM SUPPORT Choices Enabled Disabled S5 RTC Wake Settings ...

Page 53: ...Enabled Wake System with Dynamic Time Choices Disabled Enabled CPU Configuration These items show the advanced specifications of your CPU Read only Hyper Threading Choices Disabled Enabled Active Processor Cores Choices All 1 2 Limit CPUID Maximum Disabled for Windows XP Choices Disabled Enabled ...

Page 54: ...s leave it enabled For DP MP servers it may use to tune performance the specific application Choices Disabled Enabled Intel Virtualization Technology Choices Disabled Enabled Power Technology Choices Disabled Energy Efficient Custom TDC Limit Turbo XE Mode Processor TDC Limit in 1 8 A granularity 0 means using the factory configured value TDP Limit Turbo XE Mode Processor TDP Limit in 1 8 W granul...

Page 55: ...e SATA devices such as hard disk drive or CD ROM drive SATA Mode This setting specifies the function of the on chip SATA controller Choices Disabled IDE Mode RAID Mode AHCI Mode Serial_ATA Controller 0 Choices Disabled Compatible Enabled Serial_ATA Controller 1 Choices Disabled Compatible Enabled ...

Page 56: ...m IGD Boot Type Select the Video Device which will be activated during POST Choices VBIOS Default CRT LVDS CRT LVDS DVI CRT DVI LCD Panel Type Choices 800x480 LVDS 800x600 LVDS 1024x768 LVDS 1280x1024 LVDS Panel Scaling Choices Auto Force Scaling Off Maintain Aspect Ratio Backlight Control Choices PWM Intverted PWM Normal GMBus Inverted GMBus Normal Active LVDS Choices No LVDS Int LVDS ...

Page 57: ...BIOS Setup Information 96M4371o User s Manual 4 12 Intel TDT AT p Configurations Inter Theft Deterrence Technology Configuration TDT Choices Disabled Enabled TDT Recovery Choices 1 64 ...

Page 58: ... the operating system that does not support or have any USB 1 1 2 0 driver installed such as DOS and SCO Unix Choices Disabled Enabled Auto EHCI Hand Off This is a workaround for OSes without EHCI hand off support The EHCI ownership change should claim by EHCI driver Choices Disabled Enabled Device Reset timeout Choices 10 sec 20 sec 30 sec 40 sec ...

Page 59: ...etup Information 96M4371o User s Manual 4 14 Super IO Configuratoin List all the option that can be set of Super I O Including Floppy Disk control Serial Port 0 1 Configuration and Parallel Port configuration ...

Page 60: ...oppy Disk Controller Configuration Floppy Disk Controller Choices Disabled Enabled Change Settings Choices Auto IO 3F0h IRQ 6 DMA 2 IO 3F0h IRQ 3 4 5 6 7 10 11 12 DMA 2 3 IO 370h IRQ 3 4 5 6 7 10 11 12 DMA 2 3 Device Mode Choices Read Write Write Protect ...

Page 61: ...Serial Port Choices Disabled Enabled Change Settings Choices Auto IO 3F8h IRO 4 IO 3F8h IRO 3 4 5 6 7 10 11 12 IO 2F8h IRO 3 4 5 6 7 10 11 12 IO 3E8h IRO 3 4 5 6 7 10 11 12 IO 2E8h IRO 3 4 5 6 7 10 11 12 Device Mode Choices Standard Serial Port Mode IrDA 1 0 HP SIR Mode ASK IR Mode ...

Page 62: ...sabled Enabled Change Settings Choices Auto IO 378h IRQ 5 IO 378h IRO 5 6 7 10 11 12 IO 378h IRQ 5 6 7 10 11 12 IO 278h IRQ 5 6 7 10 11 12 IO 38Ch IRQ 5 6 7 10 11 12 Device Mode Choices STD printer mode SPP mode EPP 1 9 and SPP mode EPP 1 7 and SPP mode ECP mode ECP and EPP 1 9 mode ECP and EPP 1 7 mode ...

Page 63: ...S Setup Information 96M4371o User s Manual 4 18 Watchdog Timer WDT controller Choices Disabled Enabled Change Settings Choices WDT Disabled 10 Seconds 20 Seconds 30 Seconds 40 Seconds 50 Seconds 60 Seconds ...

Page 64: ... Setup Information 96M4371o User s Manual 4 19 Smart Fan control Smart Fan1 2 control Choices Disabled Enabled Smart Fan1 2 Start Choices 25 30 35 40 45 50 55 60 65 70 Fan1 2 Fill Speed Choices 60 65 70 75 ...

Page 65: ...BIOS Setup Information 96M4371o User s Manual 4 20 H W monitor ...

Page 66: ...BIOS Setup Information 96M4371o User s Manual 4 21 Thermal Configuration ...

Page 67: ...porting Choices Disabled Enabled SMBus Buffer Length Choices 1 2 5 9 10 14 20 Thermal Reporting EC PEC Choices Disabled Enabled Select Slots with TS on DIMM Choices NO TS on DIMM TS on DIMM in Slot DIMM0 TS on DIMM in Slot DIMM1 TS on DIMM in Slot DIMM0 and DIMM1 MCH Temp Read Choices Disabled Enabled ...

Page 68: ...ces Disabled Enabled CPU Energy Read Choices Disabled Enabled Alert Enable Lock Choices Disabled Enabled CPU Alert Choices Disabled Enabled MCH Alert Choices Disabled Enabled PCH Alert Choices Disabled Enabled DIMM Alert Choices Disabled Enabled Intelligent Power Sharing ...

Page 69: ...PEC Config Processor Power Error Correction Choices 1 to 50 IPS Policy Choices DRIVER PROCESSOR BALANCED GRAPHICS Core Temp Limit Choices Disabled Enabled MCH Power Limit Choices Disabled Enabled Processor Power Limit Choices Disabled Enabled Core Power Limit Choices Disabled Enabled Run Time Interface Choices BIOS with MMIO EC uses SMBug ...

Page 70: ...BIOS Setup Information 96M4371o User s Manual 4 25 AMT Configuration AMT Choices Disabled Enabled Unconfigure AMT ME Choices Disabled Enabled WatchDog Timer Choices Disabled Enabled ...

Page 71: ...BIOS Setup Information 96M4371o User s Manual 4 26 Serial Port Console Redirection Console Redirection Choices Disabled Enabled Terminal Type Choices VT100 VT100 VT UTF8 ANSI ...

Page 72: ...BIOS Setup Information 96M4371o User s Manual 4 27 Memory testing Memory testing Choices Disabled Enabled Mode of testing Choices Normal test Fast test ...

Page 73: ...BIOS Setup Information 96M4371o User s Manual 4 28 4 4 Chipset This menu controls the advanced features of the onboard Northbridge and Southbridge ...

Page 74: ... 4 29 Enable CRID Choices Disabled Enabled North Bridge Chipset Configuration Low MMIO Align Choices 64MB 1024MB Initate Graphic Adapter Select which graphics controller to use as the primary boot device Choices IGD PCI IGD PCI PEG PEG IGD PEG PCI ...

Page 75: ...ices 14 31 VT d Choices Disabled Enabled PCI Express Compliance Mode Choices Disabled Enabled PCI Express Port Choices Disabled Enabled Auto IGD Memory Choices Disabled 32M 64M 128M PAVP Mode Choices Disabled Enabled PEG Force Gen1 Choices Disabled Enabled South Bridge Configuration ...

Page 76: ...re AC Power Loss Choices Power Off Power On Last State SLP_S4 Assertion Stretch Enable Choices Disabled Enabled SLP_S4 Assertion Width Choices 1 2 2 3 3 4 4 5 seconds Azalia HD Audio Choices Disabled Enabled Azalia Internal HDMI Codec Choices Disabled Enabled High Precision timer Choices Disabled Enabled Wakeup by Ring Choices Disabled Enabled ...

Page 77: ...BIOS Setup Information 96M4371o User s Manual 4 32 PCI Express Ports Configuration All PCI Express Ports can be set as choices Disabled Enabled Auto ...

Page 78: ...USB Configuration ALL USB Devices Choices Disabled Enabled EHCI Controller 1 Choices Disabled Enabled EHCI Controller 2 Choices Disabled Enabled RHM Support Choices Disabled Enabled Auto USB Port 0 1 2 3 4 5 6 7 8 9 10 11 12 13 Choices Disabled Enabled ...

Page 79: ...BIOS Setup Information 96M4371o User s Manual 4 34 ME Subsystem Configuration ME Subsystem Choices Enabled Disabled End of Post Message Choices Enabled Disabled Execute MEBx Choices Enabled Disabled ...

Page 80: ...BIOS Setup Information 96M4371o User s Manual 4 35 4 5 Boot Use this menu to specify the priority of boot devices ...

Page 81: ...S feature for a faster boot up time Choices Disabled Enabled Fast Boot Enabling this setting will cause the BIOS power on self test routine to skip some of its tests during boot up for faster system boot Choices Disabled Enabled Setup Prompt Timeout Choices 1 65535 Bootup Num Lock State This setting is to set the Num Lock status when the system is powered on Setting to On will turn on the Num Lock...

Page 82: ...daptors can function as bootable disks In addition it allows you to gain access to the host adaptor s ROM setup utility if one is available When disabled the ROM BIOS of these host adaptors will not be able to capture Interrupt 19 Therefore you will not be able to boot operating systems from any bootable disks attached to these host adaptors Nor will you be able to gain access to their ROM setup u...

Page 83: ...curity Use this menu to set supervisor and user passwords Administrator Password Administrator Password controls access to the BIOS Setup utility These settings allow you to set or change the supervisor password User Password User Password controls access to the system at boot These settings allow you to set or change the user password ...

Page 84: ...nges Save Changes and Exit Exit System Setup and save your changes to CMOS Pressing Enter on this item asks for confirmation Save changes to CMOS and exit the Setup Utility Discard Changes and Exit Abandon all changes and exit the Setup Utility Save Changes and Reset Exit System Setup and save your changes to CMOS then reboot Discard Changes and Reset Abandon all changes and exit the Setup Utility...

Page 85: ...load the default values set by the SBC manufacturer specifically for optimal performance of the SBC Save as User Defaults Save all changes and considers as User s default Restore User Default Restore the setting according to User s default Launch EFI Shell from filesystem device To enter the Built in EFI shell for further modification such as upgrade BIOS Reset System with ME disable Mode Reset th...

Page 86: ...herefore is only able to run on PICMG 1 3 backplane To know whether your backplane is PICMG 1 3 backplane please contact with vendor or manufacturer Serial ATA Hard Disk Setting for IDE RAID AHCI Unlike IDE bus each Serial ATA channel can only connect to one SATA hard disk at a time there are total four connectors SATA1 4 port The installation of Serial ATA is simpler and easier than IDE because S...

Page 87: ...equence to hit DEL key and enter the BIOS setup menu to tune up a stable BIOS configuration so that you can wake up your system far well Loading the default optimal setting When prompted with the main setup menu please scroll down to Load Optimal Defaults press Enter and Y to load in default optimal BIOS setup This will force your BIOS setting back to the initial factory configuration It is recomm...

Page 88: ... users would like to disable a certain device port to release IRQ resource A few good examples are Disable COM1 serial port to release IRQ 4 Disable COM2 serial port to release IRQ 3 Etc A quick review of the basic IRQ mapping is given below for your reference IRQ Description IRQ 0 System Timer IRQ 1 Keyboard Event IRQ 2 Usable IRQ IRQ 3 COM2 IRQ 4 COM1 IRQ 5 Usable IRQ IRQ 6 Diskette Event IRQ 7 ...

Page 89: ... forward them to us System Memory Address Map Each On board device in the system is assigned a set of memory addresses which also can be identical of the device The following table lists the system memory address used Memory Area Size Description 0000 003F 1K Interrupt Area 0040 004F 0 3K BIOS Data Area 0050 006F 0 5K System Data 0070 0E2E 54K DOS 0E2F 0F6B 5K Program Area 0F6C 9B7F 562K Available...

Page 90: ...tem ROM System Timer IRQ 1 System ROM Keyboard Event IRQ 2 Unassigned Usable IRQ IRQ 3 System ROM COM2 IRQ 4 System ROM COM1 IRQ 5 Unassigned Usable IRQ IRQ 6 System ROM Diskette Event IRQ 7 Unassigned Usable IRQ IRQ 8 System ROM Real Time Clock IRQ 9 Unassigned Usable IRQ IRQ 10 Unassigned Usable IRQ IRQ 11 Video ROM Usable IRQ IRQ 12 System ROM IBM Mouse Event IRQ 13 System ROM Coprocessor Error...

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