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AMBE-2000™ Vocoder Chip Users Manual 

Version 4.92,   June, 08 

DVSI Confidential Proprietary, Subject to Change 

Page 15 

Visit us at 

www.dvsinc.com

 

Pin Number 

Pin Descriptive Name 

Pin Direction 

Notes 

41 

CODEC_TX_DATA 

Output 

PCM Data from AMBE-2020™ to D/A Converter 

27 

CODEC_RX_CLK 

Input 

A/D Serial clock. Should be connected to CODEC_TX_CLK 

33 

CODEC_TX_CLK 

Input 

D/A Serial clock Should be connected to CODEC_RX_CLK 

51 

CLOCK_MODE 

Input 

If high enables crystal oscillator option for clock source. If low then external oscillator 
option is selected. See Section 3.5 for details. 

8,11,12,23, 

36,39,44,45,

46,47,48, 
49,54,57, 

64,76,87,90 

V

DD

 

Power 

Supply Voltage  

1,9,10,25, 

26,35,40,50,

52,53,56, 

63,65,88,89 

GND 

Power 

Ground 

2,3,4,5,6,7, 
13,14,15,16,
17,18,19,21,
22,43,55,58,
59,60,61,62,
66,78,91,92,
93,94,95,96,
97,98,99, 
100 

No Connection 

 

These pins must remain unconnected 

 
NOTE 1: The AMBE-2020™  expects an encoder packet to be read approximately every 20 msec.  Following the initial reset, 
wait for EPR to go low and read the initial packet (t

0

).  20 msec later, the next packet (t

1

) should be ready.  For packet t

1

 and all 

following packets use the procedure below:       

1)

 

Wait for slightly less than 20 msec. 

2)

 

Assert CHAN_TX_STB and read word on CHAN_TX_DATA. 

3)

 

If transmitted word not 0x13EC, discard it and repeat step 2. 

4)

 

If transmitted word 0x13EC, read 23 more words (rest of packet).  

 
The EPR signal should not be used as an interrupt.  The EPR is only valid for the first high to low transition. 
A new packet should be ready every 20 msec after the initial EPR high to low transition.    A packet read should take place 
every 20 msec.  If there is a delay in the read (i.e. a packet is missed), it is recommended that the device be reset.    
 
NOTE 2:  To prevent possible damage to the chip be sure that your circuit meets the following three requirements. 

1)

 

No signals should be applied to the device (this includes clocks) before the power is applied.  

2)

 

The clock and reset must be applied to the device during power up.  If the clock and reset are not applied during 
power up, high currents may flow damaging the device.   

3)

 

All of the configuration I/O pins of the device should be pulled up or pulled down through individual 10 K ohm 
resistors to limit current flow through the I/O sections.  See Table below for the affected pins. 

 

Descriptive Name 

Pin Number 

 

Descriptive Name 

Pin Number 

CHAN_SEL1 

77 

 

VAD_EN 

86 

CHAN_SEL0 

75 

 

ENCODER_EN 

24 

CODEC_SEL1 

85 

 

SLEEP_EN 

83 

CODEC_SEL0 

84 

 

SLIP_EN 

82 

RATE_SEL4 

74 

 

SPFT_EN 

79 

RATE_SEL3 

73 

 

BAUD_SEL0 

80 

RATE_SEL2 

72 

 

BAUD_SEL1 

81 

RATE_SEL1 

71 

 

 

 

RATE_SEL0 

70 

 

 

 

 

Summary of Contents for AMBE-2020

Page 1: ...AMBE 2020 Vocoder Chip User s Manual Version 4 92 June 08 Digital Voice Systems Inc The Speech Compression Specialists...

Page 2: ...no warranties with respect to the documentation and disclaims any implied warranties of merchantability and fitness for a particular purpose Digital Voice Systems Inc shall not be liable for any erro...

Page 3: ...g the third party with a copy of this Agreement or ii providing the third party with an agreement written by the END USER hereinafter END USER Agreement so long as the END USER Agreement is approved i...

Page 4: ...xcept for taxes based upon DVSI s income including but not limited to all sales use rental receipt personal property or other taxes which may be levied or assessed in connection with this Agreement 11...

Page 5: ...3 Clock and Reset Timing 16 3 4 Associated Chip Delay 17 3 5 Crystal Oscillator Usage 18 3 5 1 TTL Clock Source 18 3 5 2 Crystal Oscillator 18 3 6 Package Description 19 3 7 Normal Operating Condition...

Page 6: ...rd 2 37 5 3 10 Framed Output Words 12 23 Channel Data 38 5 4 Unframed Serial Format 38 5 4 1 Unframed Serial Output Format 38 5 4 2 Unframed Serial Input Format 39 6 A D D A Interface 40 6 1 A D D A O...

Page 7: ...020 voice coder maintains natural voice quality and speech intelligibility at rates as low as 2 0 kbits sec The AMBE algorithm s low complexity allows it to be fully integrated into a low cost low pow...

Page 8: ...DVSI Confidential Proprietary Subject to Change Page 8 Visit us at www dvsinc com 1 3 Typical Applications Satellite Communications Digital Mobile Radio Secure Communications Cellular Telephony and P...

Page 9: ...functions between the AMBE 2020 channel format and the format of the system channel Optional functions of the chip such as voice activation detection power mode control data FEC rate selection etc are...

Page 10: ...to A Convertor AMBE Voice Encoder AMBE Voice Decoder Analog Input Reference Pt Analog Output Reference Pt Digital Output Reference Pt Digital Input Reference Pt Analog Speech Digital Speech 8 kHz samp...

Page 11: ...pplied after speech decoding An additional recommendation addresses the maximum noise level measured at the output reference points shown in Figure 2 B with the corresponding inputs set to zero DVSI r...

Page 12: ...er to gain synchronization with the data stream before it can properly synthesize the speech waveform Also the Unframed mode only commits a single bit per frame to maintain data alignment In higher er...

Page 13: ...20 Vocoder Chip allows it to be mounted by infrared reflow vapor phase reflow or equivalent processes The peak package body temperature must not exceed 220 C The AMBE 2020 Vocoder Chip requires baking...

Page 14: ...nable Decoder and disable Encoder 83 SLEEP_EN Input Standard Sleep Enable Pin Active HIGH See Section 7 5 1 82 SLIP_EN Input Slip Control Enable Pin Active HIGH See Section 7 6 68 X2 CLKIN Input Clock...

Page 15: ...0 msec 2 Assert CHAN_TX_STB and read word on CHAN_TX_DATA 3 If transmitted word not 0x13EC discard it and repeat step 2 4 If transmitted word 0x13EC read 23 more words rest of packet The EPR signal sh...

Page 16: ...CLKIN and CLKOUT Timing Parameters Reference Parameter Min Max Units tc CI Cycle time X2 CLKIN Integer PLL multiplier N N 4 20 400 ns tf CL Fall time X2 CLKIN 4 ns tr CL Rise time X2 CLKIN 4 ns tw CIL...

Page 17: ...before X2 CLKIN low 5 ns tsu INT Setup time INTn NMI RS before CLKOUT low 10 ns CLKOUT is shown for reference only it is not connected 3 4 Associated Chip Delay The associated delay due to the coding...

Page 18: ...tance Keep X2 CLKIN and X1 away from high frequency digital traces example CLKOUT to avoid coupling 3 5 1 TTL Clock Source If CLOCK_MODE pin is low then a TTL CMOS source is used as the clock input Co...

Page 19: ...sinc com 3 6 Package Description 100 pin TQFP Thin Quad Flat Pack All Dimensions are in millimeters Figure 3 F Package Dimensions 0 45 0 75 76 100 75 51 26 50 1 25 14 20 13 80 SQ 16 20 15 80 SQ 12 00...

Page 20: ...w dvsinc com Figure 3 G Package Dimensions AMBE 2020 10 The DVSI device part number DVSI Digital Voice Systems Incorporated D16877PZ 66 Internal Texas Instruments part number for the AMBE 2020 A WF Co...

Page 21: ...or any other conditions in excess of those given in the operational sections of the data sheet Exposure to Absolute Maximum Ratings for extended periods can aversely affect device reliability Table 3...

Page 22: ...r Test Conditions MIN TYP MAX Unit VOH High level output voltage VDD 3 3 V IOH MAX 2 4 V VOL Low level output voltage IOL MAX 0 4 V IX Input current in high impedance VI VSS to VDD VDD MAX VI VSS to V...

Page 23: ...lize that not all data being output from the AMBE 2020 is intended for transmission over the channel Status type of data is typically only useful at the local end In most voice transmission systems th...

Page 24: ...0 Active Unframed 0 1 Passive Framed 1 0 Passive Unframed 1 1 Table 4 B Unframed Bit per Word Selection Table Interface Select Pins Number of Voice Data Bits per Word BAUD_SEL1 pin 81 BAUD_SEL0 pin 8...

Page 25: ...Strobe This signal indicates to the AMBE 2020 when the data on CHAN_RX_DATA will be latched by CHAN_RX_CLK See figure 4 B CHAN_TX_DATA Out 42 Serial Data Output 16 bits of channel data are output on C...

Page 26: ...X_CLK CHAN_TX_STRB CHAN_TX_DATA td FSX th FSX H tw SCK tr SCK tf SCK tdis DX th DX tw SCK 1 2 15 16 CHAN_RX_CLK CHAN_RX_STRB CHAN_RX_DATA th FSR tsu FSR tc SCK tw SCK tw SCK tr SCK tf SCK tsu DR th DR...

Page 27: ...ns tr SCK Rise time serial port clock 6 ns tw SCK Pulse duration serial port clock low high 3H ns tsu FSR Setup time FSR before CLKR falling edge 6 ns tsu DR Setup time DR before CLKR falling edge 6 n...

Page 28: ...ramed format is more flexible 5 1 Framed Format The Framed format is a 24 by sixteen bit word format for a total of 48 bytes or 384 bits Every 20 milliseconds either the encoder outputs 24 sixteen bit...

Page 29: ...ta 21 Channel Data 22 Channel Data 20 ms frame 24 sixteen bit words 48 bytes 384 bits 12 16 bit words of data 192 bits 23 Channel Data 5 2 1 Framed Input Word 0 Header The decoder uses the header info...

Page 30: ...ransmission DTX 5 2 4 Framed Input Words 2 6 Rate Information Rate Info 0 Rate Info 1 Rate Info 2 Rate Info 3 Rate Info 4 The initial rate of the AMBE 2020 is set through the hardware pins RATE_SEL 4...

Page 31: ...0 9600 Table 5 D Rate Selection Using Rate Info 0 4 AMBE 2020 only AMBE Rate Info 0 Rate Info 1 Rate Info 2 Rate Info 3 Rate Info 4 Speech Rate bps FEC Rate bps Total Rate bps 0x0028 0x0000 0x0000 0x0...

Page 32: ...70 0x89 6 1477 770 0x82 7 1209 852 0x86 8 1336 852 0x8A 9 1477 852 0x87 0 1336 941 0x83 1209 941 0x8B 1477 941 0x8C A 1633 697 0x8D B 1633 770 0x8E C 1633 852 0x8F D 1633 941 0xff Inactive N A N A To...

Page 33: ...ket to continue in sleep mode Set this bit to 0 to exit Sleep mode VAD In order to set the Voice Activity Detector ON set the VAD bit to 1 To set Voice Activity Detection to OFF set the VAD bit to 0 5...

Page 34: ...5 3 1 Framed Output Word 0 Header The header is a 16 bit word that begins each valid frame corresponding to 20 milliseconds of speech This field will always be 0x13EC 5 3 2 Framed Output Word 1 Power...

Page 35: ...3 this field is reset The BER is calculated only when using FEC provided by the AMBE 2020 5 3 6 Framed Output Word 8 Soft Decision Distance This status field is used in conjunction with hardware pin 7...

Page 36: ...not correspond to a valid DTMF tone if the energy contained within the low frequency band is more than 10 dB greater than the energy contained in the high frequency band An input signal shall not be r...

Page 37: ...al ring and busy tones are standard North American call progress tones An expanded list of tones and values can be found in the Appendices Section 8 4 DTMF Amplitude The DTMF Amplitude runs from 3 to...

Page 38: ...The designer should also be aware that it takes approximately 15 frames 300 milliseconds for the decoder to attain synchronization with the incoming stream before it can output synthesized speech Sys...

Page 39: ...coded voice data bits The number of words that need to be transferred into the decoder for each 20 millisecond frame will be the number of bits per frame divided by the number of bits per word So a sy...

Page 40: ...port on the AMBE 2020 In order to simplify the process of configuring the interface to the A D D A chip a number of preset configurations can be chosen through the CODEC_SEL 1 0 pins shown in Table 6...

Page 41: ...X_STRB CODEC_TX_DATA td FSX th FSX H tw SCK tr SCK tf SCK tdis DX th DX tw SCK 1 2 7 15 8 16 CODEC_RX_CLK CODEC_RX_STRB CODEC_RX_DATA th FSR tsu FSR tc SCK tw SCK tw SCK tr SCK tf SCK tsu DR th DR tc...

Page 42: ...ns tr SCK Rise time serial port clock 6 ns tw SCK Pulse duration serial port clock low high 3H ns tsu FSR Setup time FSR before CLKR falling edge 6 ns tsu DR Setup time DR before CLKR falling edge 6 n...

Page 43: ...t is performed 7 2 Coding Rate Selection The Voice coding rate as well as the FEC coding rate can be selected individually on the AMBE 2020 These rates are selected by using Rate Info words as describ...

Page 44: ...allows the corresponding decoder to synthesize a Comfort Noise signal at the other end The comfort noise is intended to give the listener the feeling that the call is still connected as opposed to pro...

Page 45: ...e frames in either direction Depending on the low power state selected either a Wake Up Control Word or a hardware reset on RESETN is necessary to return the AMBE 2020 to normal operation 7 5 1 Standa...

Page 46: ...some background information on the operation of the AMBE 2020 in passive mode In order to help understand the Slip control feature here is a brief description on reading encoder packets from the AMBE...

Page 47: ...chip s internal slip adjustment of 160 to 161 sample per frame is used In order to work properly the system designer must set up the sample rate and packet timing so that the following constraint is m...

Page 48: ...red method for using Slip Control Packets is to monitor the availability of data from the AMBE 2020 vocoder chip and to only input Slip Control Packets into the data stream sent to the AMBE 2020 as ne...

Page 49: ...HIGH 16 384 MHz U1 AMBE 2020 27 33 37 29 31 41 CODEC_RX_CLK CODEC_TX_CLK CODEC_TX_STRB CODEC_RX_STRB CODEC_RX_DATA CODEC_TX_DATA U2 AD73311 14 17 18 16 19 20 15 3 9 12 SCLK SDOFS SDIFS SDO SDI SE MCLK...

Page 50: ...E DETAIL BELOW AMBE 2020 AVDD U27 TLV320AIC10 13 16 17 26 3 2 1 45 34 33 40 42 46 25 7 6 5 4 15 30 14 29 24 38 23 22 21 48 47 10 11 20 27 9 8 12 19 43 RESET DOUT DIN ALTIN AURXCP AURXM AURXFP AV DD 1...

Page 51: ...ever for reference the AMBE 2020 has been tested with the TLV320AIC10 configured using the register values shown in Table 1 Once the TLV320AIC10 is configured the AMBE 2020 should be taken out of rese...

Page 52: ...ary Subject to Change Page 52 Visit us at www dvsinc com SHIFT Q0 U8A 1 2 CE Q1 U9 AND4 1 2 3 4 5 Q3 VDD CNTL_DATA 15 0 SCLK CLR CLK D_IN 15 0 Serial Out LS_IN CLK AIC_LOAD AIC_CTRL U6A 1 2 COUNT AIC_...

Page 53: ...C3 200pF R13 5 6K R5 10K R8 10K 3 3VA R15 10K R11 10K R7 220 R9 10K C5 10uF AURXCP VOICEOUTP C7 10uF C9 10uF 3VA C6 0 1uF C8 10uF AURXM C2 10uF 3 3VA J1 Handset 2 3 1 4 2 3 1 4 R3 100K U1B 5 6 7 R2 20...

Page 54: ...1 2 High U5A SN74AHC125 2 3 1 SDI CONTROL AMBE 2020 U4A SN74AHC125 2 3 1 0 DSP 3 3 Volts U2 AD73311AR 14 17 18 16 19 20 15 3 9 12 SCLK SDOFS SDIFS SDO SDI SE MCLK AVDD1 AVDD2 DVDD DSP Microcontroller...

Page 55: ...BE 2000 or AMBE 2020 vocoder chip utilizing the method described above for sending alternate configuration words to the AD73311 CODEC Table 3 lists alternate control words for configuring the AD73311L...

Page 56: ...to 3 6 v The second advantage lies in its simplicity There are no complicated configuration schemes associated with the codec For configuration information please see the PCM3500 data sheet and the re...

Page 57: ...vided in the Texas Instruments PCM3500 data sheet before finalizing any design Additional Reference Material AMBE 2000 or AMBE 2020 vocoder chip Users Manual http www dvsinc com literature htm Applica...

Page 58: ...TSC 7 BCK 8 FS 9 DIN 10 DOUT 11 FSO 12 DGND 14 Vdd 13 Vcc 24 AGND 23 Vout 22 AGND 21 PDWN 20 Loop 19 HPFD 18 XTI 17 XT0 16 SCKIO 15 3 3 V CODEC_TX RX_CLK CODEC_TX RX_STRB U1B 5 6 7 R5 220K 3 3VA R10...

Page 59: ...to 3812 5 Hz in 31 25 Hz steps Tone Index Decimal Tone Type Freq 2 Hz Freq 1 Hz 0 4 Invalid N A N A 5 Single N A 156 25 6 Single N A 187 5 7 Single N A 218 75 122 Single N A 3812 5 123 127 Invalid N...

Page 60: ...is in more detail http www mathworks com access helpdesk help toolbox commblks usersguide tutor135 shtml The AMBE 2000 2020 utilizes a 4 bit soft decision decoder The bits are defined as follows Decis...

Page 61: ...SD57 SD58 SD59 27 SD60 SD61 SD62 SD63 28 SD64 SD65 SD66 SD67 29 SD68 SD69 SD70 SD71 30 SD72 SD73 SD74 SD75 31 SD76 SD77 SD78 SD79 32 SD80 SD81 SD82 SD33 33 SD84 SD85 SD86 SD87 34 SD88 SD89 SD90 SD91...

Page 62: ...recommended to set the rate via the Rate_Sel configuration pins Pins 74 73 72 71 70 as shown in Table 1 By hardwiring these pins the procedure outlined below can be avoided AMBE 2000 2020 Rate Selecti...

Page 63: ...l data 6 0x0000 Must be 0x0000 7 0x0000 Must be 0x0000 8 0x0000 Must be 0x0000 9 0x0000 Must be 0x0000 10 0x0000 Must be 0x0000 11 0x0000 Must be 0x0000 12 23 Channel Data for AMBE voice decoder Table...

Page 64: ...1 February 2001 Updated Timing Diagrams and Tables for Channel and Codec 21 22 36 37 Changed Pin Description CLK_I to X2 CLKIN and CLK_I2 to X1 11 Updated timing diagram and table for X2 CLKIN and RES...

Page 65: ...4 6 Dec 06 Revised High level input voltage I O values in Table 3e 21 4 7 May 07 Added Table 3G Section 3 10 Thermal Resistance Characteristics 22 4 8 Sept 07 Edited Table in Note 2 on page 15 15 4 9...

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