Digilent Cmod S7 Reference Manual Download Page 8

22.8.2018

Cmod S7 Reference Manual [Reference.Digilentinc]

https://reference.digilentinc.com/reference/programmable-logic/cmod-s7/reference-manual

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(https://reference.digilentinc.com/_detail/reference/programmable-logic/cmod-s7/cmod-s7-basic-io.png?id=reference%3Aprogrammable-
logic%3Acmod-s7%3Areference-manual)

Figure 6.1 Cmod S7 Basic I/O

The Cmod S7 has a 48-pin DIP form factor connector, implemented as four 9-pin headers for connecting to breadboards and custom
fixtures. The pins have 100 mil spacing, and the entire module is 0.7 inches by 3.05 inches. Headers J1 and J3 are separated by 700 mil
lengthwise along the Cmod, measured from the center of the innermost pins, as are headers J2 and J4. Headers J1 and J2 are separated by
600 mil across the board, as are headers J3 and J4. Of the 48 possible pin locations, 36 are populated on the four headers. Of these, 32
are directly connected to FPGA Digital I/Os, 2 are voltage-divided and connected to FPGA analog inputs, and two are connected to
power pins. The pin and header numbers are shown in Figure 7.1.

7 DIP Header

Summary of Contents for Cmod S7

Page 1: ...s an external power input rail and ground are routed to 100 mil spaced through hole pins making the Cmod S7 well suited for use with solderless breadboards At just 0 7 by 3 05 inches it can be loaded...

Page 2: ...22 8 2018 Cmod S7 Reference Manual Reference Digilentinc https reference digilentinc com reference programmable logic cmod s7 reference manual 2 12 Xilinx Spartan 7 FPGA XC7S25 1CSGA225C Features...

Page 3: ...factor header 32 total FPGA I O 2 single ended 0 3 3V analog inputs to XADC 2 power pins https reference digilentinc com _detail reference programmable logic cmod s7 cmod s7 callout png id reference...

Page 4: ...e 1 1 The characteristics of the outputs are shown in Table 1 1 https reference digilentinc com _detail reference programmable logic cmod s7 cmod s7 power png id reference 3Aprogrammable logic 3Acmod...

Page 5: ...to decompress the bitstream itself during configuration Depending on design complexity compression ratios of 10x can be achieved Bitstream compression can be enabled within the Xilinx tools to occur d...

Page 6: ...l purpose user I O pins after FPGA configuration and can be used like any other FPGA I O https reference digilentinc com _detail reference programmable logic cmod s7 cmod s7 flash png id reference 3Ap...

Page 7: ...ence manual Figure 5 1 USB UART Bridge The Cmod S7 includes one RGB LED 4 individual LEDs and 2 push buttons as shown in Figure 6 1 The push buttons are connected to the FPGA via series resistors to p...

Page 8: ...cting to breadboards and custom fixtures The pins have 100 mil spacing and the entire module is 0 7 inches by 3 05 inches Headers J1 and J3 are separated by 700 mil lengthwise along the Cmod measured...

Page 9: ...r if a user accidentally drives a signal that is supposed to be used as an input The downside to this added protection is that these resistors limit the maximum switching speed of these signals to 25...

Page 10: ...2 6 pin headers Each 12 pin Pmod connector provides two 3 3V VCC signals pins 6 and 12 two Ground signals pins 5 and 11 and eight logic signals as sown in Figure 8 1 The VCC and Ground pins can deliv...

Page 11: ...ilentinc com technology partners Distributors https store digilentinc com our distributors Our Partners Technical Support Forum https forum digilentinc com Reference Wiki https reference digilentinc c...

Page 12: ...ps reference digilentinc com reference programmable logic cmod s7 reference manual 12 12 https instagram com digilentinc https github com digilent https www reddit com r digilent https www linkedin co...

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