Diamond Systems CME-Atom, User Manual, Page: 27 / 38

CME-Atom User Manual 1.2 www.diamondsystems.com Page 27
4.2.2 PCI Bus Interface
This set of pins implements the module‟s PCI expansion bus. For further information regarding the functions of
the PCI bus signals, refer to the PCI Bus Specification, available from the PCI Special Interest Group
(
http://www.pcisig.com/specifications ).
Signal Name Signal Function Direction
PCI_AD[0:31] PCI bus multiplexed address and data lines I/O
PCI_C/BE[0:3]# PCI bus byte enable lines, active low I/O
PCI_DEVSEL# PCI bus Device Select. I/O
PCI_FRAME# PCI bus Frame control line. I/O
PCI_IRDY# PCI bus Initiator Ready control line. I/O
PCI_TRDY# PCI bus Target Ready control line. I/O
PCI_STOP# PCI bus STOP control line. I/O
PCI_PAR PCI bus parity I/O
PCI_PERR# Parity Error:. I/O
PCI_REQ[0:3]# PCI bus master request input lines. I
PCI_GNT[0:3]# PCI bus master grant output lines. O
PCI_RESET# PCI Reset output. O
PCI_LOCK# PCI Lock control line. I/O
PCI_SERR# System Error: SERR# may be pulsed active by any PCI
device that detects a system error condition.
I/O
PCI_PME# PCI Power Management Event: PCI peripherals drive
PME# to wake system from low-power states S1
–S5.
I
PCI_CLKRUN# Bidirectional pin used to support PCI clock run protocol for
mobile systems.
I/O
PCI_IRQ[A:D]# PCI interrupt request lines. I
PCI_CLK PCI 33MHz clock output. O
PCI_M66EN Pull down strap. I