DFI-ITOX CA61, User Manual

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3
Award BIOS Setup Utility
This section gives you functions to configure the system based on
the specific features of the chipset. The chipset manages bus
speeds and access to system memory resources. It also
coordinates communications between the conventional ISA bus
and the PCI bus. These items should not be altered unless
necessary. The default settings have been chosen because they
provide the best operating conditions for your system. The only
time you might consider making any changes would be if you
discovered some incompatibility or that data was being lost while
using your system.
CPU/PCI Clock (MHz)
This field provides several options for selecting the external system
bus clock of the processor. When selecting the external bus clock of
your processor, the PCI clock will at the same time appear next to
the external bus clock selected. For example, if you selected
"66.8/33.4", 66.8MHz is the external bus clock and 33.4MHz is the
PCI clock. Regardless of the type of processor used, the default
setting is “Default”. Under this setting, the system will run according
to the processor’s clock frequency. If you selected an option other
than "Default" and is unable to boot up the system, there are 2
methods of going back to its default setting.
3.1.3 Chipset Features Setup
ROM PCI/ISA BIOS
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
↑ ↓ → ←
ESC
F1
F5
F6
F7 : Quit
: Help
: Old Values
: Load Fail-Safe Settings
: Load Optimal Settings
PU/PD/+/-
(Shift) F2
: Select Item
: Modify
: Color
**** System Health Monitor ****
Current System Temp.
Current CPU Temperature
Current Chassis FAN Speed
Current CPU FAN Speed
CPU(V)
+1.5 V
+3.3 V
+5
V
+12 V
-12 V
-5
V
: 28
o
C/82
o
F
: 42
o
C/107
o
F
: 0 RPM
: 4326 RPM
The settings on the screen are for reference only. Your version may not be identical
to this one.
: 2.00 V
: 1.51 V
: 3.40 V
: 5.08 V
: 12.34 V
: -11.76 V
: -5.09
V
: Normal
: Normal
: Normal
: 3
: Host CLK
: Disabled
: Disabled
: Enabled
: Enabled
: Enabled
: Disabled
: Disabled
: Enabled
: Disabled
: Disabled
: Disabled
: 64
: Enabled
: Default
: Disabled DIMM 1 DRAM Timing
DIMM 2 DRAM Timing
DIMM 3 DRAM Timing
SDRAM CAS Latency
DRAM Clock
Read Around Write
Concurrrent PCI/Host
CPU to PCI Write Buffer
PCI Dynamic Bursting
PCI Master 0 WS Write
PCI Delay Transaction
PCI#2 Access #1 Retry
AGP Master 1 WS Write
AGP Master 1 WS Read
Video RAM Cacheable
Memory Hole At 15M-16M
AGP Aperture Size <MB>
AGP-2X Mode
CPU/PCI Clock (MHz)
Spread Spectrum