Denon DVP-602CI, Service Manual

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23
DVP-602CI
SEMICONDUCTORS
Only major semiconductors are shown, general semiconductors etc. are omitted to list.
The semiconductor which described a detailed drawing in a schematic diagram are omitted to list.
主な半導体を記載しています。汎用の半導体は記載を省略しています。
回路図の中に詳細図がある半導体は記載を省略しています。
1. IC’s
Note : Abbreviation ahead of IC No. indicates the name of P.W.B. UNIT.
注 ) : IC No. の前の記号は、基板の名称を表します。
ETHE : ETHERNET UNIT DIGITAL : DIGITAL VIDEO UNIT
DSP : DSP SCPU UNIT FRONT : FRONT UNIT
M30879FLBFP (FRONT : IC604)
M30879FLBFP Terminal Function
Pin Pin Name Symbol I/O Type Det VCC Op(Ext.) Res STBY stop Function
1 P96/TXD4 CPUPOWER O C 5V − Z O/L O/L SW 5V control pin(SWM5V)
2 P95/CLK4 AVPOWER O − − 5V − Z O/H O/L VIDEO Power supply control pin(HDMI5V,VA5V)
3 P94/CTS4 TRIGPROT I − E ↓ &L 5V Eu Z I O/L TRIGGER PROTECTION detect pin
4 P93/CTS3 GUI̲RST. O C Lv 3.0V − Z O/L O/L GUI control pin
5 P92/TXD3 MO231I O C − 5V − Z I O/L 232C-2 control
6 P91/RXD3 MI232O I − − 5V Ed Z O/L O/L 232C-2 control
7 P90/CLK3 GUI̲REQ. O C − 3.3V − Z O/L O/L GUI control pin
8 BYTE BYTE I − − − − − − − GND (Ext. data bus bit width switching, 16bit : L)
9 CNVSS CNVSS I − − 5V − Z I I
Single-chip / Micro-processor mode switching
(Normal single-chip : L,Rewrite boot program start :
H input set)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
P0_0/AN0_0/D0
P0_1/AN0_1/D1
P0_2/AN0_2/D2
P0_3/AN0_3/D3
P0_4/AN0_4/D4
P0_5/AN0_5/D5
P0_6/AN0_6/D6
P0_7/AN0_7/D7
P1_
0/D8
P1_
1/D9
P1_2/D10 P1
_3/D11
P1
_4/D12
VREF
AVSS
VCC1
XIN
XO
UT
VSS
RESET CNVSS
P8_7
/XCIN
P8_
6/XCOUT
BYTE
P2_
0/AN2_0/A0(/D0
/-)
P2
_1/AN2_1/A1
(/D1
/D0)
P2
_2/AN2_2/A2
(/D2/D1)
P2_3
/AN2
_3/A3(/D3/D2)
P2
_4/AN2_4/A4(/D4/D3)
P2_5/AN2_5/A5(/D5/D4) P2_6
/AN2_
6/A6(/D6/D5)
P2_7/AN2_
7/A7(/D7/D6
)
P3
_0/A8(
/-/D7
)
P
3
_
1
/A9
P3
_
2
/A1
0
P3
_3/A1
1
P3
_
4
/A1
2
P
3
_
5
/A1
3
P
3
_
6
/A1
4
P3_
7
/A1
5
P4
_0
/A16
P4
_1
/A17
P4
_2/A18
P4
_3/A19
P7
_4
/TA2
OUT
/W
P7
_6
/TA3
O
UT
P5_6/ALE
P7
_7
/TA3
IN
P5_5/HOLD
P5_4/HLDA
P5_3/BCLK
P5_2/RD
VCC2 VSS
P5_7/RDY/CLKOUT
P4_5/CS1
P4_6/CS2
P4_7/CS3
AVCC
P6_3/TXD0/SDA0
P6_5/CLK1
P6_6/RXD1/SCL1
P6_7/TXD1/SDA1
P6_1/CLK0
P6_2/RXD0/SCL0
P10_0/AN0
P10_1/AN1
P10_2/AN2
P10_3/AN3
P9_3/DA0/TB3IN
P9_
4/DA1
/T
B4IN
P9_5/ANEX0/CLK4
P9_6
/ANEX1/SOUT4
P9_1/TB1IN/SIN3
P9_2/TB2IN/SOUT3
P8
_0/T
A4OUT
/U
P6_0/CTS0/RTS0
P6_4/CTS1/RTS1/CTS0/CLKS1
P7
_2
/CLK2
/TA1OUT/V
P8
_2
/INT0
P7
_1/RXD2/SCL2/TA0IN/T
B5
IN
(1)
P8
_3/INT1
P8
_5/NMI
P9_7/ADTRG/SIN4
P4_4/CS0
P5_0/WRL/WR
P5_1/WRH/BHE
P9_
0/T
B0IN/CLK3
P7
_0/TXD2
/SDA2
/T
A0OUT
(1)
P8
_4/INT
2/Z
P
P8
_1/TA4
IN/U
P7
_3/CTS2
/RTS2
/TA1
IN/V
P7
_5
/TA2
IN/W
P1_5/D13/INT3 P1
_6/D14
/INT
4
P1_7/D15/INT5
P10_7/AN7/KI3
P10_6/AN6/KI2
P10_5/AN5/KI1
P10_4/AN4/KI0
M16C/62 Group
(M16C/62P, M16C/62PT)
NOTES:
1. P7_0 and P7_1 are N channel open-drain output pins.