14
14
DN-C635
72
P75,SBO1
MLD
O
-
-
Hi-Z
H
DSP interface latch
73
TEST1
TEST1
I
-
Pu
-
-
Pull up 33 - 50K
74
TEST2
TEST2
I
-
Pu
-
-
Pull up 33 - 50K
75
_NMI
--
I
Lv
Pu
Hi-Z
-
Not used.
76
PA0,_IRQ0
BLKCK
I
Ed
-
Hi-Z
-
Sub code clock interruption
77
PA1,_IRQ1
DQSY
I
Ed
-
Hi-Z
-
CD-TEXT DQSY Interruption
78
PA2,_IRQ2
FADER ST
I
Ed
-
Hi-Z
-
Fader signal
79
PA3,_IRQ3
REMOTE-
I
Ed
-
Hi-Z
-
RC-5/Infrared remote signal input
80
PA4,_IRQ4,TM15IB CHGOFT
O
-
Pu
H
L
Off track signal
81
PA5,ADSEP
ADSEP
I
-
H
H
H
H': Address data separation mode / 'L': Address data common mode
82
_RST
RST-
I
Lv
Pu
L
-
Reset signal 'L': RESET
83
Vdd
Vdd
-
-
-
-
-
Power supply (+3.3V)
84
P00,D00,AD00
D00
D/O
-
-
Hi-Z
-
Data bus
85
P01,D01,AD01
D01
D/O
-
-
Hi-Z
-
Data bus
86
P02,D02,AD02
D02
D/O
-
-
Hi-Z
-
Data bus
87
P03,D03,AD03
D03
D/O
-
-
Hi-Z
-
Data bus
88
P04,D04,AD04
D04
D/O
-
-
Hi-Z
-
Data bus
89
P05,D05,AD05
D05
D/O
-
-
Hi-Z
-
Data bus
90
P06,D06,AD06
D06
D/O
-
-
Hi-Z
-
Data bus
91
P07,D07,AD07
D07
D/O
-
-
Hi-Z
-
Data bus
92
Vss
Vss
-
-
-
-
-
GND (0V)
93
P010,D08,AD08,
TM8IOB
ST_MONO
O
-
Pu
H
H
Output mode STEREO/MONO=1/0
94
P011,D09,AD09,
TM8IC
FIX_VAR1
O
-
Pu
H
H
VCO MORMAL/PITCH=0/1
95
P012,D10,AD10,
TM11IOA
DEBAG1
O
-
-
-
-
Terminal 1 for debag
96
P013,D11,AD11,
TM11IOB
OPEN
I
-
-
Hi-Z
-
OPEN switch
97
P014,D12,AD12,
TM11IC
CLOSE
I
-
-
Hi-Z
-
CLOSE switch
98
P015,D13,AD13,
TM12IOA
LOAD
O
-
-
Hi-Z
H
OPEN/CLOSE signal (PWM out put) (During Pnrst='L', out put
PWM(50%))
99
P016,D14,AD14,
TM12IOB
DEBAG1
O
-
-
-
H
Terminal 2 for debag
100
P017,D15,AD15,
TM12IC
LIMITSW-
I
O
-
Hi-Z
-
Inner circle SW
Pin
No.
Pin Name
Symbol
I/O
Det
Ext
Res
Ini
Function