20
20
D-AJ03
71
P30/RD
-
O
P.U
0
72
P31/WR
-
O
P.U
0
73
P32/HWR
OEM
→
V/H
I
P.D
CD SET UP L:vertical(F.B:Nonadjustment)
0
74
P33/WAIT
MODEL
I
MODEL Detecter H:03xMD L:03xCD
3.0V
75
P34/BUSRQ
SDB_D I
I
SDB switching, L: 75342M use, H: 88pin L/H
0
76
P35/BUSAK
-
O
P.D
0
77
P36/R/W
-
O
P.D
0
78
P37/BOOT
-
O
P.U
3.0V
79
P40/CS0
-
O
P.D
0
80
P41/CS1
-
O
P.D
0
81
P42/CS2
-
O
P.D
0
82
P43/CS3
-
O
P.D
0
83
P60/SCK
IC_CLK
O
Clock for external control IC
0
84
P61/S0/SDA
IC_DI
O
Data output for external control IC
0
85
P62/SI/SCL
IC_DO
I
Data input for external control IC
3.0V
86
P63/INT0
IC_CE
I
Chip enable for external control IC
0
87
P64/SCOUT
SYS_CLK
O
SYS.CLOCK OUT(OPEN)
1.4V
88
P65/
SDB_O
O
SDB switching, 75pin operate at H, H: ON
0
89
DVCC
DVCC
I
3.3v
3.0V
90
P66/
TU_MUTE
O
tuner MUTING terminal(H
→
L:MUTE)
3.0V
91
DVSS
DVSS
I
GND
3.0V
92
P50/AN0
KEY1
I
A/D KEY input 1
3.0V
93
P51/AN1
KEY2
I
A/D KEY input 2
3.0V
94
P52/AN2
KEY3
I
A/D KEY input 3
3.0V
95
P53/AN3/ADIRG
P.W.B_TEST
I
P.D
H: PWB check MODE, L: Normal
0
96
P54/AN4
SPAN
I
Frequency SPAN switch
0
97
P55/AN5
-
I
P.D
0
98
P56/AN6
TU_TU
I
TUNER TUNING DETECT(H
→
L:TUNING)
3.0V
99
P57/AN7
TU_ST
I
STEREO RECEIVE DETECT(H
→
L:STEREO RECEIVE)
3.0V
100
VREFH
VREFH
I
3.3V
3.0V
P.No
Symbol
Port Name
Port
Function
Voltage
(V)
TEST POINT
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