Denon AVC-1909, Service Manual

Page: 48 / 161

48
AVR-1909/789, AVC-1909
Pin
No Pin Name I/O Type
Voltage
Tolerance Drive
Pull up/
Pulldown Description
89 VSS Ground Ground
90 TEST IN
Input
5V Test input-Connect to ground
91 SDRAM ADDR(10) Tristate O/P 5v 8 mA SDRAM address bus *
92 SDRAM ADDR(9)
Tristate O/P
5v 8 mA SDRAM address bus *
93 SDRAM ADDR(8) Tristate O/P 5v 8 mA SDRAM address bus *
94 SDRAM ADDR(7) Tristate O/P 5v 8 mA SDRAM address bus *
95 SDRAM ADDR(6) Tristate O/P 5v 8 mA SDRAM address bus *
96 VDDcore5
Power
1.8 V – Power pin for core
97 VSScore Ground Ground
98 SDRAM ADDR(5)
Tristate O/P
5v 8 mA SDRAM address bus *
99 SDRAM ADDR(4) Tristate O/P 5v 8 mA SDRAM address bus *
100 SDRAM ADDR(3) Tristate O/P 5v 8 mA SDRAM address bus *
101 SDRAM ADDR(2) Tristate O/P 5v 8 mA SDRAM address bus *
102 SDRAM ADDR(1) Tristate O/P 5v 8 mA SDRAM address bus *
103 SDRAM ADDR(0)
Tristate O/P
5v 8 mA SDRAM address bus *
104 SDRAM WEN Tristate O/P 5v 8 mA SDRAM write enable *
105 SDRAM RASN
Tristate O/P
5v 8 mA SDRAM row address select *
106 SDRAM CASN
Tristate O/P
5v 8 mA SDRAM column address select *
107 SDRAM BA1 Tristate O/P 5v 8 mA SDRAM bank select 1*
108 SDRAM BA0 Tristate O/P 5v 8 mA SDRAM bank select 0*
109 SDRAM CSN Tristate O/P 5v 4 mA SDRAM CS *
110 SDRAM DQM Tristate O/P 5v 8 mA SDRAM DQM *
111 SDRAM CLKOUT
Output
5v 12 mA Clock out to SDRAM *
112 VDD6 Power 3.3 V - Power pin for IO
113 VSS
Ground
Ground
114 SDRAM CLKIN Input 5v Trace delayed SDRAM Clock in
115 TEST3
Input
Test input – Connect to ground
116 TEST OUT0 Output Test output – leave open
117
TEST OUT1 / Interrupt
Out Output
Interrupt Output
118 CTLOUT0
Tristate O/P
5v 8 mA
Control signal output selectable as HSync1/
CSync/HRef/Monitor coast
119 CTLOUT1
Tristate O/P
5v 8 mA
Control signal output selectable as
VSync1/CRef/VRef/Film Indicator
120 CTLOUT2
Tristate O/P
5v 8 mA
Control signal output selectable as Monitor
coast/HRef/VDD_en / HSync2
121 CTLOUT3
Tristate O/P
5v 8 mA
Control signal output selectable as Film
Indicator/VRef/backlight_en/VSync2
122 CTLOUT4
Tristate O/P
5v 8 mA
Control signal output selectable as CRef/Field
ID/CSync/Monitor coast
123 VDDcore6 Power 1.8 V - Power pin for core
124 VSScore Ground Ground
125 CLKOUT Tristate O/P 5v 12 mA Output data rate clock
126 B/U/Pb_OUT_0 Tristate O/P 5v 8 mA Digital video output – Blue/U/Pb
127 B/U/Pb_OUT_1 Tristate O/P 5v 8 mA Digital video output – Blue/U/Pb