Dell PowerEdge M710 Technical Guide
22
7
Memory
7.1
Overview
The PowerEdge™ M710 uses DDR3 memory providing a high performance, high-speed memory
interface capable of low latency response and high throughput. The PowerEdge M710 supports
registered ECC DDR3 DIMMs (RDIMM) or Unbuffered ECC DDR3 DIMMs (UDIMM).
Key features of the PowerEdge M710 memory system include:
•
Registered (RDIMM) and Unbuffered (UDIMM) ECC DDR3 technology
•
Each channel carries 64 data and eight ECC bits
•
Support for up to 288 GB of RDIMM memory (with eighteen 16 GB RDIMMs)
•
Support for up to 24 GB of UDIMM memory (with twelve 2 GB UDIMMs)
•
Support for 800/1066/1333 MT/s single and dual rank DIMMs
•
Support for 1066 MT/s quad rank DIMMs
•
Support ODT (On Die Termination)
•
Clock gating (CKE) to conserve power when DIMMs are not accessed
•
DIMMs enter a low power self-refresh mode
•
I
2
C access to SPD EEPROM for access to RDIMM thermal sensors
•
Single Bit Error Correction
•
SDDC (Single Device Data Correction)
•
Support for Closed Loop Thermal Management on RDIMMs and UDIMMs Multi Bit Error
Detection Support for Memory Optimized Mode
•
Support for Advanced ECC mode
•
Multi Bit Error Detection
•
Support for Memory Optimized Mode
•
Support for Memory Mirroring
•
Support for memory sparing
•
Support for both standard (1.5V) and low-voltage (1.35V) DIMM configurations, though the LV
DIMMs require an Intel Xeon 5600 series processor
7.2
DIMMs Supported
The DDR3 memory interface consists of three channels with up to two RDIMMs or UDIMMs per channel
for single/dual rank, and up to two RDIMMs per channel for quad rank. The interface uses 2 GB,
4 GB, 8 GB or 16GB RDIMMs. 1 GB or 2 GB UDIMMs are also supported. The memory mode is
dependent on how the memory is populated in the system:
•
Lockstep
: two channels per CPU populated identically
o
Typically, the system will be set to run in Memory Optimized (Independent Channel)
mode in this configuration. This mode offers the most DIMM population flexibility and
system memory capacity, but offers the least number of RAS (reliability, availability,
service) features.
o
All three channels must be populated identically.
•
Memory sparing:
users wanting memory sparing must also populate the DIMMs identically in
all three channels, but one channel would be the spare and not accessible as system memory
until brought online to replace a failing channel.
o
The first two channels per CPU populated identically with the third channel unused.
