DayTronic System 10, User Manual Book

Page: 285 / 414

4
O
PTIONAL
B
RIDGE
C
OMPLETION
:
M
ODEL
10CJB-2 D
UAL
B
RIDGE
C
OMPLETION
C
ARD
4.a P
URPOSE
The optional Model 10CJB-2 Dual Bridge Completion Card lets you connect each
of your Model 10A72-2C’s inputs to a 2-wire 1/4-bridge, 3-wire 1/4-bridge, 1/2-bridge,
or full-bridge strain gage configuration. Each 1/4-bridge configuration may use either
120 or 350 ohms nominal gage resistance. The function of the Model 10CJB-2 is to
“complete” the connected bridge—that is, to allow it to be “seen” by the Model 10A72-
2C as a full (4-arm) Wheatstone bridge.
For calibration of 10A72-2C channels originating from the Model 10CJB-2, see Section
4.c, below.
4.b 10CJB-2 T
RANSDUCER
C
ONNECTIONS
Remove the top plate of the Model 10CJB-2 box (4 screws in corners). Inside the box
are two sets of labelled screw terminals, one for each of the 10A72-2C’s input chan-
nels (“A” and “B”). You will connect your gage wires directly to these terminals, as
shown in Fig. 6, and, if necessary, interconnect certain terminal pairs by means of
jumper wires. Gage leads should enter the 10CJB-2 through the cutout on the right-
hand side of the box.
NOTE: You must furnish your own pin-to-pin shielded cable for connecting the
10CJB-2 to the 10A72-2C’s rear I/O CONNECTOR (see Table 2 for pin assignments)—
or you may use a special cable furnished by Daytronic. In either case, Daytronic will
supply terminal connectors for the cable.
E
NHANCED
D
UAL
DC S
TRAIN
G
AGE
C
ARD
10A72-2C
O
PTIONAL
B
RIDGE
C
OMPLETION
10A72-2C.
9
+CALIBRATE
C
1
2
3
4
5
6
7
8
9
10
J
A
B
D
E
F
H
K
L
CONDITIONER CONNECTOR (No. 60322)
SIG. COMMON
–CALIBRATE
Channel
1
Channel 2:
+CALIBRATE
SIG. COMMON
–CALIBRATE
OPEN = Logic 1
(NO ±Calibration)
CLOSED = Logic 0
(±Calibration)
A
B
+CALIBRATE
C
1
2
3
4
5
6
7
8
9
10
J
A
B
D
E
F
H
K
L
CONDITIONER CONNECTOR (No. 60322)
SIG. COMMON
–CALIBRATE
Channel
1
Channel 2:
+CALIBRATE
SIG. COMMON
–CALIBRATE
TTL TTL
+5 V +5 V
Fig. 5 Logic Inputs for 10A72-2C Remote Shunt Calibration
Fig. 5(a) Switch Closure,
No External Supply
Fig. 5(b)
Active TTL Logic