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bc630AT Real Time Clock Module
7-1
CHAPTER SEVEN
ADJUSTMENTS
7.0 GENERAL
The bc630AT has only a single adjustment which should never require alteration by the user. This
section outlines a method for correctly setting the phase lock loop adjustment, variable resistor R6.
7.1 PHASE LOCK LOOP ADJUSTMENT
The following steps assume that the bc630AT is correctly mounted on a baseboard and is exposed to
allow access by an oscilloscope probe. A source of IRIG B time code is required.
•
Select an IRIG B timecode by writing a 'B' (42H) to offset location 08H or in demonstration
program 630DEMO2 select "IRIG B ONLY" for the time code select register. This step forces the
bc630AT to search for a 1000Hz carrier frequency only.
•
Input the IRIG B time code through the BNC connector (J3) or pin #1 of J1.
•
Use pin #16 of U2 as the input to channel A of a dual channel oscilloscope. Use the reference
carrier selected in Step 2 above as the input to channel B of the oscilloscope. Use channel A as the
oscilloscope horizontal synch input.
•
Adjust R6 so that the negative going transitions on pin #16 are centered on the negative "peaks" of
the carrier. See figure 7-1 below.
Figure 7-1
Phase Lock Loop Adjustment
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