
Specifications
143
DC Accuracy
Offset error
d
±1 mV
±1 mV
Offset error temperature coefficient
±(7.2
V/
C )/ Gain) ± 100
V/
C ±(7.2
V/
C )/ Gain) ± 100
V/
C
Gain error
Gain of 1:
Gain of 10:
±0.02%
±0.5%
±0.02%
±0.5%
Gain error temperature coefficient
50 ppm/
C 50
ppm/
C
ADC Integral Non-Linearity error, INL
±0.0006% of full-scale range
±0.0006% of full-scale range
ADC Differential Non-Linearity error, DNL
Monotonic to 24 bits
Monotonic to 24 bits
Dynamic Performance
e
Gain of 1
Gain of 10
Gain of 1
Gain of 10
Effective Number of Bits, ENOB
f
(1 kHz input, 105.5 kSPS)
–1 dBFS input:
–6 dBFS input:
15.5 bits
16.4 bits
15.4 bits
15.9 bits
15.9 bits
16.4 bits
15.8 bits
16.2 bits
Signal to Noise and Distortion Ratio, SINAD
g
(1 kHz input, 105.5 kSPS)
–1 dBFS input:
–6 dBFS input:
94 dB
94 dB
93 dB
91 dB
97 dB
94 dB
96 dB
93 dB
Signal to Noise Ratio, SNR
h
(1 kHz input, 105.5 kSPS)
–1 dBFS input:
–6 dBFS input:
98 dB
94 dB
96 dB
91 dB
98 dB
94 dB
97 dB
93 dB
Total Harmonic Distortion, THD
i
(1 kHz input, 105.5 kSPS)
–1 dBFS input:
–6 dBFS input:
–96 dB
–104 dB
–96 dB
–101 dB
–104 dB
–110 dB
–103 dB
–109 dB
Spurious Free Dynamic Range, SFDR
j
(1 kHz input, 105.5 kSPS)
–1 dBFS input:
–6 dBFS input:
98 dBFS
110 dBFS
98 dBFS
109 dBFS
105 dBFS
118 dBFS
105 dBFS
118 dBFS
Noise Floor
(50
input termination, 105.5 kSPS)
58
VRMS
7.5
VRMS
58
VRMS
7.5
VRMS
Overvoltage Protection
Overvoltage protection
Power on:
Power off:
+40 V to –20 V
±40 V
+40 V to –20 V
±40 V
ESD protection
Arc:
Contact:
8 kV
4 kV
8 kV
4 kV
a. The total frequency response is the combined frequency response of the ADC Delta Sigma filter and the analog filter.
b. Channel 0 is the reference channel with a 20 Vpp signal and a maximum sample rate of 105.469 kSamples/s.
c. Cable capacitance of 30 pF per foot (typical) must be added.
d. Offset errors are referred to the input.
Table 24: Analog Input Subsystem Specifications (cont.)
Feature
DT9857 Specifications
DT9857E Specifications
Summary of Contents for DT9857
Page 1: ...DT9857 and DT9857E UM 25656 N User s Manual Title Page ...
Page 4: ......
Page 10: ...Contents 10 ...
Page 14: ...About this Manual 14 ...
Page 25: ...Part 1 Getting Started ...
Page 26: ......
Page 40: ...Chapter 2 40 ...
Page 64: ...Chapter 4 64 ...
Page 71: ...Part 2 Using Your Module ...
Page 72: ......
Page 75: ...Principles of Operation 75 Figure 32 Block Diagram of the DT9857E Module ...
Page 126: ...Chapter 6 126 ...
Page 132: ...Chapter 7 132 ...
Page 140: ...Chapter 8 140 ...
Page 180: ...Appendix B 180 ...
Page 181: ...181 C Register Level Programming Writing to the EEPROM Register 182 ...
Page 184: ...Appendix C 184 ...
Page 192: ...Index 192 ...